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Searched refs:phy_en_refclk (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/phy/ti/
H A Dphy-j721e-wiz.c240 struct regmap_field *phy_en_refclk; member
362 struct regmap_field *phy_en_refclk; member
697 wiz->phy_en_refclk = devm_regmap_field_alloc(dev, regmap, phy_en_refclk); in wiz_regfield_init()
698 if (IS_ERR(wiz->phy_en_refclk)) { in wiz_regfield_init()
700 return PTR_ERR(wiz->phy_en_refclk); in wiz_regfield_init()
709 struct regmap_field *phy_en_refclk = wiz_phy_en_refclk->phy_en_refclk; in wiz_phy_en_refclk_enable() local
711 regmap_field_write(phy_en_refclk, 1); in wiz_phy_en_refclk_enable()
719 struct regmap_field *phy_en_refclk = wiz_phy_en_refclk->phy_en_refclk; in wiz_phy_en_refclk_disable() local
721 regmap_field_write(phy_en_refclk, 0); in wiz_phy_en_refclk_disable()
727 struct regmap_field *phy_en_refclk = wiz_phy_en_refclk->phy_en_refclk; in wiz_phy_en_refclk_is_enabled() local
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/linux-6.15/Documentation/devicetree/bindings/phy/
H A Dphy-cadence-torrent.yaml43 Optional parent clock (phy_en_refclk) to enable a reference clock output feature
50 - enum: [ pll1_refclk, phy_en_refclk ]
/linux-6.15/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-main.dtsi103 clock-names = "refclk", "phy_en_refclk";
H A Dk3-j722s-main.dtsi43 clock-names = "refclk", "phy_en_refclk";
81 clock-names = "refclk", "phy_en_refclk";
H A Dk3-j784s4-j742s2-main-common.dtsi1134 clock-names = "refclk", "phy_en_refclk";
1171 clock-names = "refclk", "phy_en_refclk";
1214 clock-names = "refclk", "phy_en_refclk";
H A Dk3-am64-main.dtsi1016 clock-names = "refclk", "phy_en_refclk";
H A Dk3-j721s2-main.dtsi1377 clock-names = "refclk", "phy_en_refclk";