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Searched refs:nvkm_wr32 (Results 1 – 25 of 190) sorted by relevance

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/linux-6.15/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv40.c106 nvkm_wr32(device, 0x400784, inst); in nv40_gr_chan_fini()
319 nvkm_wr32(device, 0x405000, i); in nv40_gr_init()
351 nvkm_wr32(device, 0x400860, 0); in nv40_gr_init()
352 nvkm_wr32(device, 0x400864, 0); in nv40_gr_init()
396 nvkm_wr32(device, 0x400820, 0); in nv40_gr_init()
397 nvkm_wr32(device, 0x400824, 0); in nv40_gr_init()
398 nvkm_wr32(device, 0x400864, vramsz); in nv40_gr_init()
399 nvkm_wr32(device, 0x400868, vramsz); in nv40_gr_init()
420 nvkm_wr32(device, 0x400840, 0); in nv40_gr_init()
421 nvkm_wr32(device, 0x400844, 0); in nv40_gr_init()
[all …]
H A Dnv20.c42 nvkm_wr32(device, 0x400784, inst >> 4); in nv20_gr_chan_fini()
43 nvkm_wr32(device, 0x400788, 0x00000002); in nv20_gr_chan_fini()
48 nvkm_wr32(device, 0x400144, 0x10000000); in nv20_gr_chan_fini()
268 nvkm_wr32(device, 0x400890, 0x00a8cfff); in nv20_gr_init()
269 nvkm_wr32(device, 0x400610, 0x304B1FB6); in nv20_gr_init()
307 nvkm_wr32(device, 0x400820, 0); in nv20_gr_init()
308 nvkm_wr32(device, 0x400824, 0); in nv20_gr_init()
309 nvkm_wr32(device, 0x400864, vramsz - 1); in nv20_gr_init()
310 nvkm_wr32(device, 0x400868, vramsz - 1); in nv20_gr_init()
313 nvkm_wr32(device, 0x400B20, 0x00000000); in nv20_gr_init()
[all …]
H A Dnv30.c118 nvkm_wr32(device, 0x400890, 0x01b463ff); in nv30_gr_init()
122 nvkm_wr32(device, 0x400B80, 0x1003d888); in nv30_gr_init()
123 nvkm_wr32(device, 0x400B84, 0x0c000000); in nv30_gr_init()
124 nvkm_wr32(device, 0x400098, 0x00000000); in nv30_gr_init()
125 nvkm_wr32(device, 0x40009C, 0x0005ad00); in nv30_gr_init()
127 nvkm_wr32(device, 0x4000a0, 0x00000000); in nv30_gr_init()
128 nvkm_wr32(device, 0x4000a4, 0x00000008); in nv30_gr_init()
129 nvkm_wr32(device, 0x4008a8, 0xb784a400); in nv30_gr_init()
130 nvkm_wr32(device, 0x400ba0, 0x002f8685); in nv30_gr_init()
131 nvkm_wr32(device, 0x400ba4, 0x00231f3f); in nv30_gr_init()
[all …]
H A Dnv50.c316 nvkm_wr32(device, addr + 0x14, 0); in nv50_gr_mp_trap()
443 nvkm_wr32(device, 0x400808, 0); in nv50_gr_trap_handler()
445 nvkm_wr32(device, 0x400848, 0); in nv50_gr_trap_handler()
468 nvkm_wr32(device, 0x40084c, 0); in nv50_gr_trap_handler()
478 nvkm_wr32(device, 0x400108, 0x001); in nv50_gr_trap_handler()
500 nvkm_wr32(device, 0x400040, 2); in nv50_gr_trap_handler()
501 nvkm_wr32(device, 0x400040, 0); in nv50_gr_trap_handler()
503 nvkm_wr32(device, 0x400108, 0x002); in nv50_gr_trap_handler()
543 nvkm_wr32(device, 0x400040, 0x80); in nv50_gr_trap_handler()
544 nvkm_wr32(device, 0x400040, 0); in nv50_gr_trap_handler()
[all …]
H A Dnv44.c44 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
45 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
46 nvkm_wr32(device, NV20_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
53 nvkm_wr32(device, NV47_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
54 nvkm_wr32(device, NV47_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
55 nvkm_wr32(device, NV47_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
56 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch); in nv44_gr_tile()
58 nvkm_wr32(device, NV40_PGRAPH_TILE1(i), tile->addr); in nv44_gr_tile()
61 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
63 nvkm_wr32(device, NV20_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
[all …]
H A Dnv10.c489 nvkm_wr32(device, NV10_PGRAPH_XFMODE0, xfmode0); in nv17_gr_mthd_lma_window()
490 nvkm_wr32(device, NV10_PGRAPH_XFMODE1, xfmode1); in nv17_gr_mthd_lma_window()
615 nvkm_wr32(device, NV10_PGRAPH_XFMODE0, xfmode0); in nv10_gr_load_pipe()
854 nvkm_wr32(device, NV10_PGRAPH_CTX_SWITCH(i), in nv10_gr_load_dma_vtxbuf()
860 nvkm_wr32(device, NV10_PGRAPH_FFINTFC_ST2, in nv10_gr_load_dma_vtxbuf()
869 nvkm_wr32(device, 0x4007a0 + 4 * i, fifo[i]); in nv10_gr_load_dma_vtxbuf()
1117 nvkm_wr32(device, NV03_PGRAPH_INTR, stat); in nv10_gr_intr()
1153 nvkm_wr32(device, 0x400a10, 0x03ff3fb6); in nv10_gr_init()
1154 nvkm_wr32(device, 0x400838, 0x002f8684); in nv10_gr_init()
1155 nvkm_wr32(device, 0x40083c, 0x00115f3f); in nv10_gr_init()
[all …]
H A Dgf100.c59 nvkm_wr32(device, 0x405820, zbc); in gf100_gr_zbc_clear_color()
106 nvkm_wr32(device, 0x405820, zbc); in gf100_gr_zbc_clear_depth()
758 nvkm_wr32(device, 0x409504, mthd); in gf100_gr_fecs_ctrl_ctxsw()
820 nvkm_wr32(device, 0x409500, inst); in gf100_gr_fecs_wfi_golden_save()
839 nvkm_wr32(device, 0x409500, inst); in gf100_gr_fecs_bind_pointer()
874 nvkm_wr32(device, 0x409810, inst); in gf100_gr_fecs_set_reglist_bind_instance()
978 nvkm_wr32(device, 0x409500, timeout); in gf100_gr_fecs_set_watchdog_timeout()
1117 nvkm_wr32(device, 0x400200, addr); in gf100_gr_icmd()
1531 nvkm_wr32(device, 0x400108, trap); in gf100_gr_trap_intr()
1602 nvkm_wr32(device, 0x409c20, stat); in gf100_gr_ctxctl_isr()
[all …]
H A Dga102.c47 nvkm_wr32(device, 0x41bcec, color[0]); in ga102_gr_zbc_clear_color()
48 nvkm_wr32(device, 0x41bcf0, color[1]); in ga102_gr_zbc_clear_color()
49 nvkm_wr32(device, 0x41bcf4, color[2]); in ga102_gr_zbc_clear_color()
50 nvkm_wr32(device, 0x41bcf8, color[3]); in ga102_gr_zbc_clear_color()
66 nvkm_wr32(device, 0x41a610, 0x00000000); in ga102_gr_gpccs_reset()
68 nvkm_wr32(device, 0x41a610, 0x00000001); in ga102_gr_gpccs_reset()
85 nvkm_wr32(device, 0x409614, 0x00000010); in ga102_gr_fecs_reset()
86 nvkm_wr32(device, 0x41a614, 0x00000020); in ga102_gr_fecs_reset()
88 nvkm_wr32(device, 0x409614, 0x00000110); in ga102_gr_fecs_reset()
89 nvkm_wr32(device, 0x41a614, 0x00000a20); in ga102_gr_fecs_reset()
[all …]
H A Dtu102.c32 nvkm_wr32(gr->base.engine.subdev.device, 0x409c24, 0x006e0003); in tu102_gr_init_fecs_exceptions()
68 nvkm_wr32(device, GPC_BCAST(0x0980 + ((i / 8) * 4)), data); in tu102_gr_init_zcull()
72 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), in tu102_gr_init_zcull()
74 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | in tu102_gr_init_zcull()
76 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); in tu102_gr_init_zcull()
79 nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918); in tu102_gr_init_zcull()
88 nvkm_wr32(device, 0x418890, 0x00000000); in tu102_gr_init_gpc_mmu()
89 nvkm_wr32(device, 0x418894, 0x00000000); in tu102_gr_init_gpc_mmu()
91 nvkm_wr32(device, 0x4188b4, nvkm_rd32(device, 0x100cc8)); in tu102_gr_init_gpc_mmu()
92 nvkm_wr32(device, 0x4188b8, nvkm_rd32(device, 0x100ccc)); in tu102_gr_init_gpc_mmu()
[all …]
H A Dgk20a.c184 nvkm_wr32(device, 0x419e44, 0x1ffffe); in gk20a_gr_set_hww_esr_report_mask()
185 nvkm_wr32(device, 0x419e4c, 0x7f); in gk20a_gr_set_hww_esr_report_mask()
195 nvkm_wr32(device, 0x40802c, 0x1); in gk20a_gr_init()
220 nvkm_wr32(device, 0x400500, 0x00010001); in gk20a_gr_init()
223 nvkm_wr32(device, 0x400100, 0xffffffff); in gk20a_gr_init()
224 nvkm_wr32(device, 0x40013c, 0xffffffff); in gk20a_gr_init()
227 nvkm_wr32(device, 0x409c24, 0x000f0000); in gk20a_gr_init()
230 nvkm_wr32(device, 0x404000, 0xc0000000); in gk20a_gr_init()
231 nvkm_wr32(device, 0x404600, 0xc0000000); in gk20a_gr_init()
237 nvkm_wr32(device, 0x419d0c, 0x2); in gk20a_gr_init()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgt215.c60 nvkm_wr32(device, 0x10a580, 0x00000001); in gt215_pmu_send()
66 nvkm_wr32(device, 0x10a1c4, process); in gt215_pmu_send()
67 nvkm_wr32(device, 0x10a1c4, message); in gt215_pmu_send()
68 nvkm_wr32(device, 0x10a1c4, data0); in gt215_pmu_send()
69 nvkm_wr32(device, 0x10a1c4, data1); in gt215_pmu_send()
73 nvkm_wr32(device, 0x10a580, 0x00000000); in gt215_pmu_send()
100 nvkm_wr32(device, 0x10a580, 0x00000002); in gt215_pmu_recv()
113 nvkm_wr32(device, 0x10a580, 0x00000000); in gt215_pmu_recv()
173 nvkm_wr32(device, 0x10a004, intr); in gt215_pmu_intr()
224 nvkm_wr32(device, 0x10a1c0, 0x01000000); in gt215_pmu_init()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.c53 nvkm_wr32(device, NV03_PFIFO_CACHES, 0); in nv04_chan_stop()
75 nvkm_wr32(device, c->regp, 0x00000000); in nv04_chan_stop()
87 nvkm_wr32(device, NV03_PFIFO_CACHES, 1); in nv04_chan_stop()
384 nvkm_wr32(device, 0x003244, dma_put); in nv04_fifo_intr_dma_pusher()
385 nvkm_wr32(device, 0x003328, ho_put); in nv04_fifo_intr_dma_pusher()
388 nvkm_wr32(device, 0x003334, ib_put); in nv04_fifo_intr_dma_pusher()
396 nvkm_wr32(device, 0x003244, dma_put); in nv04_fifo_intr_dma_pusher()
400 nvkm_wr32(device, 0x003228, 0x00000000); in nv04_fifo_intr_dma_pusher()
401 nvkm_wr32(device, 0x003220, 0x00000001); in nv04_fifo_intr_dma_pusher()
416 nvkm_wr32(device, NV03_PFIFO_CACHES, 0); in nv04_fifo_intr()
[all …]
H A Dnv40.c157 nvkm_wr32(device, reg, inst); in nv40_ectx_bind()
190 nvkm_wr32(device, 0x002040, 0x000000ff); in nv40_fifo_init()
191 nvkm_wr32(device, 0x002044, 0x2101ffff); in nv40_fifo_init()
192 nvkm_wr32(device, 0x002058, 0x00000001); in nv40_fifo_init()
203 nvkm_wr32(device, 0x002230, 0x00000001); in nv40_fifo_init()
211 nvkm_wr32(device, 0x002220, 0x00030002); in nv40_fifo_init()
214 nvkm_wr32(device, 0x002230, 0x00000000); in nv40_fifo_init()
223 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv40_fifo_init()
226 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 1); in nv40_fifo_init()
227 nvkm_wr32(device, NV04_PFIFO_CACHE1_PULL0, 1); in nv40_fifo_init()
[all …]
H A Dnv17.c101 nvkm_wr32(device, NV04_PFIFO_DELAY_0, 0x000000ff); in nv17_fifo_init()
102 nvkm_wr32(device, NV04_PFIFO_DMA_TIMESLICE, 0x0101ffff); in nv17_fifo_init()
104 nvkm_wr32(device, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ | in nv17_fifo_init()
107 nvkm_wr32(device, NV03_PFIFO_RAMRO, nvkm_memory_addr(ramro) >> 8); in nv17_fifo_init()
108 nvkm_wr32(device, NV03_PFIFO_RAMFC, nvkm_memory_addr(ramfc) >> 8 | in nv17_fifo_init()
111 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv17_fifo_init()
113 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv17_fifo_init()
114 nvkm_wr32(device, NV03_PFIFO_INTR_EN_0, 0xffffffff); in nv17_fifo_init()
116 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 1); in nv17_fifo_init()
117 nvkm_wr32(device, NV04_PFIFO_CACHE1_PULL0, 1); in nv17_fifo_init()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
H A Dnv50.c84 nvkm_wr32(device, 0x00b100, stat); in nv50_mpeg_intr()
85 nvkm_wr32(device, 0x00b230, 0x00000001); in nv50_mpeg_intr()
94 nvkm_wr32(device, 0x00b32c, 0x00000000); in nv50_mpeg_init()
95 nvkm_wr32(device, 0x00b314, 0x00000100); in nv50_mpeg_init()
96 nvkm_wr32(device, 0x00b0e0, 0x0000001a); in nv50_mpeg_init()
98 nvkm_wr32(device, 0x00b220, 0x00000044); in nv50_mpeg_init()
99 nvkm_wr32(device, 0x00b300, 0x00801ec1); in nv50_mpeg_init()
100 nvkm_wr32(device, 0x00b390, 0x00000000); in nv50_mpeg_init()
101 nvkm_wr32(device, 0x00b394, 0x00000000); in nv50_mpeg_init()
102 nvkm_wr32(device, 0x00b398, 0x00000000); in nv50_mpeg_init()
[all …]
H A Dnv31.c146 nvkm_wr32(device, 0x00b334, base); in nv31_mpeg_mthd_dma()
147 nvkm_wr32(device, 0x00b324, size); in nv31_mpeg_mthd_dma()
153 nvkm_wr32(device, 0x00b360, base); in nv31_mpeg_mthd_dma()
154 nvkm_wr32(device, 0x00b364, size); in nv31_mpeg_mthd_dma()
160 nvkm_wr32(device, 0x00b370, base); in nv31_mpeg_mthd_dma()
161 nvkm_wr32(device, 0x00b374, size); in nv31_mpeg_mthd_dma()
210 nvkm_wr32(device, 0x00b100, stat); in nv31_mpeg_intr()
211 nvkm_wr32(device, 0x00b230, 0x00000001); in nv31_mpeg_intr()
234 nvkm_wr32(device, 0x00b32c, 0x00000000); in nv31_mpeg_init()
235 nvkm_wr32(device, 0x00b314, 0x00000100); in nv31_mpeg_init()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dtu102.c127 nvkm_wr32(device, 0x640008, tmp); in tu102_disp_init()
133 nvkm_wr32(device, 0x640144 + (i * 0x08), tmp); in tu102_disp_init()
142 nvkm_wr32(device, 0x640048 + (id * 0x020), tmp); in tu102_disp_init()
164 nvkm_wr32(device, 0x640010 + (i * 0x04), tmp); in tu102_disp_init()
177 nvkm_wr32(device, 0x610010, 0x00000008 | tmp); in tu102_disp_init()
181 nvkm_wr32(device, 0x611cf0, 0x00000187); /* MSK. */ in tu102_disp_init()
182 nvkm_wr32(device, 0x611db0, 0x00000187); /* EN. */ in tu102_disp_init()
187 nvkm_wr32(device, 0x611dac, 0x00000000); /* EN. */ in tu102_disp_init()
191 nvkm_wr32(device, 0x611da8, 0x00000000); /* EN. */ in tu102_disp_init()
195 nvkm_wr32(device, 0x611da4, 0x00000000); /* EN. */ in tu102_disp_init()
[all …]
H A Dgv100.c767 nvkm_wr32(device, 0x610b28, 0x00000001); in gv100_disp_core_init()
768 nvkm_wr32(device, 0x610b2c, 0x00000040); in gv100_disp_core_init()
772 nvkm_wr32(device, 0x6104e0, 0x00000013); in gv100_disp_core_init()
889 nvkm_wr32(device, 0x6107a8, 0x80000000); in gv100_disp_super()
966 nvkm_wr32(device, 0x611858, wndws); in gv100_disp_intr_ctrl_disp()
967 nvkm_wr32(device, 0x61185c, other); in gv100_disp_intr_ctrl_disp()
1008 nvkm_wr32(device, 0x611854, stat); in gv100_disp_intr_exc_other()
1021 nvkm_wr32(device, 0x611850, BIT(wndw)); in gv100_disp_intr_exc_winim()
1028 nvkm_wr32(device, 0x611850, stat); in gv100_disp_intr_exc_winim()
1048 nvkm_wr32(device, 0x61184c, stat); in gv100_disp_intr_exc_win()
[all …]
H A Dgp102.c42 nvkm_wr32(device, 0x611494 + (ctrl * 0x0010), chan->push); in gp102_disp_dmac_init()
43 nvkm_wr32(device, 0x611498 + (ctrl * 0x0010), 0x00010000); in gp102_disp_dmac_init()
44 nvkm_wr32(device, 0x61149c + (ctrl * 0x0010), 0x00000001); in gp102_disp_dmac_init()
47 nvkm_wr32(device, 0x610490 + (ctrl * 0x0010), 0x00000013); in gp102_disp_dmac_init()
109 nvkm_wr32(device, 0x611494, chan->push); in gp102_disp_core_init()
110 nvkm_wr32(device, 0x611498, 0x00010000); in gp102_disp_core_init()
111 nvkm_wr32(device, 0x61149c, 0x00000001); in gp102_disp_core_init()
113 nvkm_wr32(device, 0x640000, chan->suspend_put); in gp102_disp_core_init()
114 nvkm_wr32(device, 0x610490, 0x01000013); in gp102_disp_core_init()
169 nvkm_wr32(device, 0x61009c, (1 << chid)); in gp102_disp_intr_error()
[all …]
H A Dgf119.c55 nvkm_wr32(device, 0x10ec00 + soff, (i << 8)); in gf119_sor_hda_eld()
972 nvkm_wr32(device, 0x610494, chan->push); in gf119_disp_core_init()
973 nvkm_wr32(device, 0x610498, 0x00010000); in gf119_disp_core_init()
974 nvkm_wr32(device, 0x61049c, 0x00000001); in gf119_disp_core_init()
977 nvkm_wr32(device, 0x610490, 0x01000013); in gf119_disp_core_init()
1064 nvkm_wr32(device, 0x6101d0, 0x80000000); in gf119_disp_super()
1137 nvkm_wr32(device, 0x6100ac, stat); in gf119_disp_intr()
1161 nvkm_wr32(device, 0x6100b0, 0x00000000); in gf119_disp_fini()
1215 nvkm_wr32(device, 0x610090, 0x00000000); in gf119_disp_init()
1216 nvkm_wr32(device, 0x6100a0, 0x00000000); in gf119_disp_init()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/engine/
H A Dfalcon.c76 nvkm_wr32(device, base + 0x004, 0x00000040); in nvkm_falcon_intr()
83 nvkm_wr32(device, base + 0x004, 0x00000010); in nvkm_falcon_intr()
89 nvkm_wr32(device, base + 0x004, intr); in nvkm_falcon_intr()
113 nvkm_wr32(device, base + 0x014, 0xffffffff); in nvkm_falcon_fini()
183 nvkm_wr32(device, base + 0x004, 0x00000010); in nvkm_falcon_init()
187 nvkm_wr32(device, base + 0x014, 0xffffffff); in nvkm_falcon_init()
269 nvkm_wr32(device, base + 0x11c, 0); in nvkm_falcon_init()
270 nvkm_wr32(device, base + 0x110, addr >> 8); in nvkm_falcon_init()
271 nvkm_wr32(device, base + 0x114, 0); in nvkm_falcon_init()
272 nvkm_wr32(device, base + 0x118, 0x00006610); in nvkm_falcon_init()
[all …]
H A Dxtensa.c70 nvkm_wr32(device, base + 0xc20, intr); in nvkm_xtensa_intr()
85 nvkm_wr32(device, base + 0xd84, 0); /* INTR_EN */ in nvkm_xtensa_fini()
86 nvkm_wr32(device, base + 0xd94, 0); /* FIFO_CTRL */ in nvkm_xtensa_fini()
140 nvkm_wr32(device, base + 0xd10, 0x1fffffff); /* ?? */ in nvkm_xtensa_init()
141 nvkm_wr32(device, base + 0xd08, 0x0fffffff); /* ?? */ in nvkm_xtensa_init()
144 nvkm_wr32(device, base + 0xc20, 0x3f); /* INTR */ in nvkm_xtensa_init()
145 nvkm_wr32(device, base + 0xd84, 0x3f); /* INTR_EN */ in nvkm_xtensa_init()
152 nvkm_wr32(device, base + 0xde0, tmp); /* SCRATCH_H2X */ in nvkm_xtensa_init()
154 nvkm_wr32(device, base + 0xce8, 0xf); /* XT_REGION_SETUP */ in nvkm_xtensa_init()
156 nvkm_wr32(device, base + 0xc20, 0x3f); /* INTR */ in nvkm_xtensa_init()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv04.c159 nvkm_wr32(device, 0x001584, in setPLL_single()
178 nvkm_wr32(device, reg, pll); in setPLL_single()
238 nvkm_wr32(device, 0x001584, in setPLL_double_highregs()
266 nvkm_wr32(device, reg2, pll2); in setPLL_double_highregs()
267 nvkm_wr32(device, reg1, pll1); in setPLL_double_highregs()
335 nvkm_wr32(device, NMNMreg, NMNM); in setPLL_double_lowregs()
337 nvkm_wr32(device, 0x403c, NMNM); in setPLL_double_lowregs()
339 nvkm_wr32(device, Preg, Pval); in setPLL_double_lowregs()
342 nvkm_wr32(device, 0x4020, Pval); in setPLL_double_lowregs()
343 nvkm_wr32(device, 0x4038, Pval); in setPLL_double_lowregs()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dg84.c64 nvkm_wr32(device, 0x20000, 0x000003ff); in g84_therm_program_alarms()
68 nvkm_wr32(device, 0x20480, sensor->thrs_shutdown.temp); in g84_therm_program_alarms()
71 nvkm_wr32(device, 0x204c4, sensor->thrs_fan_boost.temp); in g84_therm_program_alarms()
74 nvkm_wr32(device, 0x204c0, sensor->thrs_critical.temp); in g84_therm_program_alarms()
77 nvkm_wr32(device, 0x20414, sensor->thrs_down_clock.temp); in g84_therm_program_alarms()
113 nvkm_wr32(device, thrs_reg, thrs->temp); in g84_therm_threshold_hyst_emulation()
187 nvkm_wr32(device, 0x20100, 0xffffffff); in g84_therm_intr()
188 nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */ in g84_therm_intr()
199 nvkm_wr32(device, 0x20000, 0x00000000); in g84_therm_fini()
202 nvkm_wr32(device, 0x20100, 0xffffffff); in g84_therm_fini()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dnv44.c45 nvkm_wr32(device, 0x100850, 0x80000000); in nv44_mmu_init()
46 nvkm_wr32(device, 0x100818, mmu->vmm->null); in nv44_mmu_init()
47 nvkm_wr32(device, 0x100804, (nvkm_memory_size(pt) / 4) * 4096); in nv44_mmu_init()
48 nvkm_wr32(device, 0x100850, 0x00008000); in nv44_mmu_init()
50 nvkm_wr32(device, 0x100820, 0x00000000); in nv44_mmu_init()
51 nvkm_wr32(device, 0x10082c, 0x00000001); in nv44_mmu_init()
52 nvkm_wr32(device, 0x100800, addr | 0x00000010); in nv44_mmu_init()

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