Searched refs:nv_entries (Results 1 – 7 of 7) sorted by relevance
38 clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn401_build_wm_range_table_fpu()45 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()47 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()50 clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid = true; in dcn401_build_wm_range_table_fpu()56 clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()58 clk_mgr->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()63 clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid = true; in dcn401_build_wm_range_table_fpu()64 clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50; in dcn401_build_wm_range_table_fpu()72 clk_mgr->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table_fpu()84 clk_mgr->bw_params->wm_table.nv_entries[WM_D].valid = true; in dcn401_build_wm_range_table_fpu()[all …]
294 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) { in dcn30_fpu_update_soc_for_wm_a()360 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) { in dcn30_fpu_calculate_wm_and_dlg()407 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { in dcn30_fpu_calculate_wm_and_dlg()667 base->bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn3_fpu_build_wm_range_table()672 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()689 base->bw_params->wm_table.nv_entries[WM_C].valid = true; in dcn3_fpu_build_wm_range_table()690 base->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 0; in dcn3_fpu_build_wm_range_table()694 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()708 base->bw_params->wm_table.nv_entries[WM_D].valid = true; in dcn3_fpu_build_wm_range_table()710 base->bw_params->wm_table.nv_entries[WM_D].dml_input.sr_exit_time_us = 2; in dcn3_fpu_build_wm_range_table()[all …]
211 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn32_build_wm_range_table_fpu()220 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()223 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].valid = true; in dcn32_build_wm_range_table_fpu()231 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()236 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].valid = true; in dcn32_build_wm_range_table_fpu()237 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50; in dcn32_build_wm_range_table_fpu()257 clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].valid = true; in dcn32_build_wm_range_table_fpu()266 clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()2434 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) { in dcn32_calculate_wm_and_dlg_fpu()2503 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { in dcn32_calculate_wm_and_dlg_fpu()[all …]
197 clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn401_build_wm_range_table()200 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table()201 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table()202 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table()205 clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid = false; in dcn401_build_wm_range_table()210 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].valid = true; in dcn401_build_wm_range_table()213 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table()215 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table()217 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].valid = false; in dcn401_build_wm_range_table()221 clk_mgr->bw_params->wm_table.nv_entries[WM_1B].valid = false; in dcn401_build_wm_range_table()[all …]
340 if (clk_mgr->base.bw_params->wm_table.nv_entries[i].valid) { in dcn3_notify_wm_ranges()341 …termarkRow[WM_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdow… in dcn3_notify_wm_ranges()342 …termarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdow… in dcn3_notify_wm_ranges()343 …atermarkRow[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdow… in dcn3_notify_wm_ranges()344 …atermarkRow[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdow… in dcn3_notify_wm_ranges()346 ….WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdow… in dcn3_notify_wm_ranges()
238 struct nv_wm_range_entry nv_entries[WM_SET_COUNT]; member
984 if (clk_mgr->base.bw_params->wm_table.nv_entries[i].valid) { in dcn32_notify_wm_ranges()986 …table->Watermarks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_bre… in dcn32_notify_wm_ranges()