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Searched refs:num_slices_h (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/
H A Ddc_dsc.c155 const uint32_t num_slices_h,
720 const int num_slices_h, in decide_dsc_target_bpp_x16() argument
918 int num_slices_h = 0; in setup_dsc_config() local
1073 if (num_slices_h < 2) in setup_dsc_config()
1078 num_slices_h = 12; in setup_dsc_config()
1080 num_slices_h = 0; in setup_dsc_config()
1083 if (num_slices_h < 4) in setup_dsc_config()
1089 if (num_slices_h == 0) in setup_dsc_config()
1094 dsc_cfg->num_slices_h = num_slices_h; in setup_dsc_config()
1133 num_slices_h, in setup_dsc_config()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/
H A Ddc_dsc.h90 uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
94 const int num_slices_h,
H A Ddc_hw_types.h861 uint32_t num_slices_h; /* Number of DSC slices - horizontal */ member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c180 DC_LOG_DSC("\tnum_slices_h %d", config->dc_dsc_cfg.num_slices_h); in dsc_config_log()
376 ASSERT(dsc_cfg->dc_dsc_cfg.num_slices_h); in dsc_prepare_config()
388 if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || in dsc_prepare_config()
405 dsc_reg_vals->num_slices_h = dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
414 dsc_reg_vals->ich_reset_at_eol = (dsc_cfg->is_odm || dsc_reg_vals->num_slices_h > 1) ? 0xF : 0; in dsc_prepare_config()
418 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
607 NUMBER_OF_SLICES_PER_LINE, reg_vals->num_slices_h - 1, in dsc_write_to_registers()
613 reg_vals->num_slices_h - 1, ALTERNATE_ICH_ENCODING_EN, in dsc_write_to_registers()
H A Ddcn20_dsc.h546 uint32_t num_slices_h; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_hwseq.c95 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
96 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
107 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c240 NUMBER_OF_SLICES_PER_LINE, reg_vals->num_slices_h - 1, in dsc_write_to_registers()
246 reg_vals->num_slices_h - 1, ALTERNATE_ICH_ENCODING_EN, in dsc_write_to_registers()
/linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c840 uint32_t num_slices_h; member
900 if (params[i].num_slices_h) in set_dsc_configs_from_fairness_vars()
901 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
1202 params[count].num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in compute_mst_dsc_configs_for_link()
H A Damdgpu_dm.c6868 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c360 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
361 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
372 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
/linux-6.15/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c841 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
842 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
856 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_stream.c115 stream->timing.dsc_cfg.num_slices_h = 0; in dc_stream_construct()
H A Ddc_resource.c4304 if (hactive % stream->timing.dsc_cfg.num_slices_h != 0) { in decide_hblank_borrow()
4305 ceil_slice_width = (hactive / stream->timing.dsc_cfg.num_slices_h) + 1; in decide_hblank_borrow()
4306 pipe_ctx->hblank_borrow = ceil_slice_width * stream->timing.dsc_cfg.num_slices_h - hactive; in decide_hblank_borrow()
H A Ddc.c3217 uint32_t enable_dsc = (update->dsc_config->num_slices_h != 0 && in copy_stream_update_to_stream()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c1062 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in dcn32_update_dsc_on_stream()
1063 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn32_update_dsc_on_stream()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c407 timing->dsc.overrides.num_slices = stream->timing.dsc_cfg.num_slices_h; in populate_dml21_timing_config_from_stream_state()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c787 out->DSCSlices[location] = in->timing.dsc_cfg.num_slices_h; in populate_dml_output_cfg_from_stream_state()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1670 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1374 pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h; in dcn20_populate_dml_pipes_from_context()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c1432 stream->timing.dsc_cfg.num_slices_h; in build_audio_output()