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Searched refs:num_pipe_per_mec (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10_3.c60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
115 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3()
116 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v10_3()
197 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v10_3()
198 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v10_3()
289 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v10_3()
290 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v10_3()
H A Damdgpu_amdkfd_gfx_v12.c46 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
47 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
62 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v12()
63 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v12()
H A Damdgpu_amdkfd_gfx_v8.c60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
118 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
119 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
172 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hqd_load()
173 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hqd_load()
H A Damdgpu_amdkfd_gfx_v11.c58 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
59 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
111 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v11()
112 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v11()
182 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v11()
183 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v11()
274 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v11()
275 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v11()
H A Damdgpu_amdkfd_gfx_v7.c66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
123 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
124 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
H A Damdgpu_amdkfd_gfx_v9.c66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_acquire_queue()
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_acquire_queue()
166 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
167 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
314 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_hiq_mqd_load()
315 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_hiq_mqd_load()
1042 max_queue_cnt = adev->gfx.mec.num_pipe_per_mec * in kgd_gfx_v9_get_cu_occupancy()
H A Damdgpu_amdkfd_gfx_v10.c60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
146 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
147 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
303 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hiq_mqd_load()
304 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hiq_mqd_load()
H A Damdgpu_amdkfd.c180 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
201 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
H A Damdgpu_gfx.c51 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
64 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
66 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
205 int max_queues_per_mec = min(adev->gfx.mec.num_pipe_per_mec * in amdgpu_gfx_compute_queue_acquire()
215 pipe = i % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
216 queue = (i / adev->gfx.mec.num_pipe_per_mec) % in amdgpu_gfx_compute_queue_acquire()
272 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
H A Dgfx_v12_0.c969 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v12_0_compute_ring_init()
1359 adev->gfx.mec.num_pipe_per_mec = 2; in gfx_v12_0_sw_init()
1367 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v12_0_sw_init()
1387 num_compute_rings = (adev->gfx.mec.num_pipe_per_mec * in gfx_v12_0_sw_init()
1456 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v12_0_sw_init()
2767 adev->gfx.mec.num_pipe_per_mec, in gfx_v12_0_cp_compute_load_microcode_rs64()
2779 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v12_0_cp_compute_load_microcode_rs64()
2800 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v12_0_cp_compute_load_microcode_rs64()
5054 adev->gfx.mec.num_pipe_per_mec, in gfx_v12_ip_print()
5058 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v12_ip_print()
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H A Dgfx_v9_4_3.c995 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_4_3_compute_ring_init()
1021 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_alloc_ip_dump()
1058 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_4_3_sw_init()
1106 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; in gfx_v9_4_3_sw_init()
3112 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_4_3_set_priv_reg_fault_state()
3152 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_4_3_set_bad_op_fault_state()
3415 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v9_4_3_emit_wave_limit()
4541 num_inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_ip_print()
4548 adev->gfx.mec.num_pipe_per_mec, in gfx_v9_4_3_ip_print()
4555 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_4_3_ip_print()
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H A Dgfx_v11_0.c1178 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v11_0_compute_ring_init()
1585 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1598 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1606 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1724 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_sw_init()
2804 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_config_mec_cache_rs64()
3898 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_cp_compute_load_microcode_rs64()
4855 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_soft_reset()
6688 adev->gfx.mec.num_pipe_per_mec, in gfx_v11_ip_print()
6692 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v11_ip_print()
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H A Damdgpu_gfx.h111 u32 num_pipe_per_mec; member
H A Dgfx_v7_0.c2742 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
2771 size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) in gfx_v7_0_compute_pipe_init()
3017 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) in gfx_v7_0_cp_compute_resume()
4338 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v7_0_compute_ring_init()
4370 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v7_0_sw_init()
4425 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v7_0_sw_init()
H A Dgfx_v9_0.c2175 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_0_compute_ring_init()
2200 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_0_alloc_ip_dump()
2254 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_0_sw_init()
2372 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_0_sw_init()
6061 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_0_set_priv_reg_fault_state()
6097 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_0_set_bad_op_fault_state()
7173 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v9_0_emit_wave_limit()
7334 adev->gfx.mec.num_pipe_per_mec, in gfx_v9_ip_print()
7338 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_ip_print()
7375 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_ip_dump()
H A Dgfx_v10_0.c4700 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v10_0_compute_ring_init()
4725 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v10_0_alloc_ip_dump()
4768 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4783 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4791 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4907 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v10_0_sw_init()
9232 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v10_0_set_priv_reg_fault_state()
9278 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v10_0_set_bad_op_fault_state()
9640 adev->gfx.mec.num_pipe_per_mec, in gfx_v10_ip_print()
9644 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v10_ip_print()
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H A Dgfx_v8_0.c1896 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v8_0_compute_ring_init()
1937 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v8_0_sw_init()
2016 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v8_0_sw_init()
6864 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v8_0_emit_wave_limit()
H A Damdgpu_mes.c148 if (i >= (adev->gfx.mec.num_pipe_per_mec * adev->gfx.mec.num_mec)) in amdgpu_mes_init()
/linux-6.15/drivers/gpu/drm/amd/include/
H A Dkgd_kfd_interface.h111 uint32_t num_pipe_per_mec; member
/linux-6.15/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device_queue_manager.c86 int pipe_offset = (mec * dqm->dev->kfd->shared_resources.num_pipe_per_mec in is_pipe_enabled()
110 return dqm->dev->kfd->shared_resources.num_pipe_per_mec; in get_pipes_per_mec()
1706 / dqm->dev->kfd->shared_resources.num_pipe_per_mec; in set_sched_resources()
1858 dqm->dev->kfd->shared_resources.num_pipe_per_mec * in start_cpsch()
2153 / dqm->dev->kfd->shared_resources.num_pipe_per_mec; in detect_queue_hang()