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Searched refs:num_mpc_3dlut (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c128 .num_mpc_3dlut = 1,
1030 for (i = 0; i < pool->res_cap->num_mpc_3dlut; i++) { in dcn303_resource_destruct()
1209 dc->caps.color.mpc.num_3dluts = pool->res_cap->num_mpc_3dlut; //3 in dcn303_resource_construct()
1358 pool->mpc = dcn303_mpc_create(ctx, pool->mpcc_count, pool->res_cap->num_mpc_3dlut); in dcn303_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c130 .num_mpc_3dlut = 2,
1085 for (i = 0; i < pool->res_cap->num_mpc_3dlut; i++) { in dcn302_resource_destruct()
1264 dc->caps.color.mpc.num_3dluts = pool->res_cap->num_mpc_3dlut; //3 in dcn302_resource_construct()
1425 pool->mpc = dcn302_mpc_create(ctx, pool->mpcc_count, pool->res_cap->num_mpc_3dlut); in dcn302_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c650 .num_mpc_3dlut = 2,
1133 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn301_destruct()
1474 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn301_resource_construct()
1648 pool->base.mpc = dcn301_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn301_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c679 .num_mpc_3dlut = 3,
1162 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn30_resource_destruct()
1443 for (i = 0; i < pool->res_cap->num_mpc_3dlut; i++) { in dcn30_acquire_post_bldn_3dlut()
1473 for (i = 0; i < pool->res_cap->num_mpc_3dlut; i++) { in dcn30_release_post_bldn_3dlut()
2347 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //3 in dcn30_resource_construct()
2530 pool->base.mpc = dcn30_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn30_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h59 int num_mpc_3dlut; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c820 .num_mpc_3dlut = 2,
1459 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn316_resource_destruct()
1792 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn316_resource_construct()
1950 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn316_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c838 .num_mpc_3dlut = 2,
1519 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn314_resource_destruct()
1877 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn314_resource_construct()
2053 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn314_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c680 .num_mpc_3dlut = 2,
1532 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn35_resource_destruct()
1888 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn35_resource_construct()
2085 pool->base.mpc = dcn35_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn35_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c825 .num_mpc_3dlut = 2,
1463 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn315_resource_destruct()
1916 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn315_resource_construct()
2082 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn315_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c826 .num_mpc_3dlut = 2,
1463 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn31_resource_destruct()
1948 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn31_resource_construct()
2131 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn31_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c654 .num_mpc_3dlut = 4,
1449 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn321_resource_destruct()
1773 …dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //4, configurable to be before … in dcn321_resource_construct()
1942 …n321_mpc_create(ctx, pool->base.res_cap->num_timing_generator, pool->base.res_cap->num_mpc_3dlut); in dcn321_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c661 .num_mpc_3dlut = 2,
1513 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn36_resource_destruct()
1861 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn36_resource_construct()
2058 pool->base.mpc = dcn35_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn36_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c660 .num_mpc_3dlut = 2,
1512 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn351_resource_destruct()
1860 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn351_resource_construct()
2056 pool->base.mpc = dcn35_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn351_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c657 .num_mpc_3dlut = 4,
1467 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn32_resource_destruct()
1625 for (i = 0; i < pool->res_cap->num_mpc_3dlut; i++) { in dcn32_release_post_bldn_3dlut()
2219 …dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //4, configurable to be before … in dcn32_resource_construct()
2393 …dcn32_mpc_create(ctx, pool->base.res_cap->num_timing_generator, pool->base.res_cap->num_mpc_3dlut); in dcn32_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c650 .num_mpc_3dlut = 4,
1472 for (i = 0; i < pool->base.res_cap->num_mpc_3dlut; i++) { in dcn401_resource_destruct()
1914 …dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //4, configurable to be before … in dcn401_resource_construct()
2079 …n401_mpc_create(ctx, pool->base.res_cap->num_timing_generator, pool->base.res_cap->num_mpc_3dlut); in dcn401_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c467 for (i = 0; i < caps->num_mpc_3dlut; i++) { in resource_construct()