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Searched refs:num_memclk_levels (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c1038 &num_entries_per_clk->num_memclk_levels); in dcn32_get_memclk_states_from_smu()
1043 …num_entries_per_clk->num_memclk_levels = num_entries_per_clk->num_memclk_levels ? num_entries_per_… in dcn32_get_memclk_states_from_smu()
1050 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn32_get_memclk_states_from_smu()
1051 num_levels = num_entries_per_clk->num_memclk_levels; in dcn32_get_memclk_states_from_smu()
1056 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels - 1].memclk_mhz; in dcn32_get_memclk_states_from_smu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn401/
H A Ddcn401_fpu.c184 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn401_update_bw_bounding_box_fpu()
185 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn401_update_bw_bounding_box_fpu()
211 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) { in dcn401_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c88 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_memclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
1377 &num_entries_per_clk->num_memclk_levels); in dcn401_get_memclk_states_from_smu()
1378 if (num_entries_per_clk->num_memclk_levels) { in dcn401_get_memclk_states_from_smu()
1380 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels - 1].memclk_mhz; in dcn401_get_memclk_states_from_smu()
1384 if (num_entries_per_clk->num_memclk_levels && clk_mgr_base->bw_params->dc_mode_limit.memclk_mhz == in dcn401_get_memclk_states_from_smu()
1385 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels - 1].memclk_mhz) in dcn401_get_memclk_states_from_smu()
1397 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn401_get_memclk_states_from_smu()
1398 num_levels = num_entries_per_clk->num_memclk_levels; in dcn401_get_memclk_states_from_smu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c403 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()
875 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn321_update_bw_bounding_box_fpu()
876 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn321_update_bw_bounding_box_fpu()
903 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) { in dcn321_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.h168 unsigned int num_memclk_levels; member
H A Ddml2_translation_helper.c535 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels; i++)… in dml2_init_soc_states()
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h121 unsigned int num_memclk_levels; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c384 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn35_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c417 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn351_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c2512 …ram_speed_mts_offset = dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels - 1; in dcn32_calculate_wm_and_dlg_fpu()
2856 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()
3321 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn32_update_bw_bounding_box_fpu()
3322 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn32_update_bw_bounding_box_fpu()
3348 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) { in dcn32_update_bw_bounding_box_fpu()
3600 int num_mclk_levels = dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn32_override_min_req_memclk()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c145 if (dc_clk_table->num_entries_per_clk.num_memclk_levels) { in dml21_apply_soc_bb_overrides()
146 dml_clk_table->uclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_memclk_levels; in dml21_apply_soc_bb_overrides()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c1019 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = clock_table->NumMemPstatesEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c1730 …for (int i = 0; i < context->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; … in dcn401_get_power_profile()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c151 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels && dc->clk_mgr->bw_params… in dcn401_init_hw()