Searched refs:num_fclk_levels (Results 1 – 13 of 13) sorted by relevance
92 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()406 int dramclk_khz_override, fclk_khz_override, num_fclk_levels; in dcn401_auto_dpm_test_log() local433 num_fclk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels - 1; in dcn401_auto_dpm_test_log()439 fclk_khz_override = clk_mgr->base.bw_params->clk_table.entries[num_fclk_levels].fclk_mhz * 1000; in dcn401_auto_dpm_test_log()826 …table.entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_fclk_levels - 1].fclk_mhz; in dcn401_build_update_bandwidth_clocks_sequence()1391 &num_entries_per_clk->num_fclk_levels); in dcn401_get_memclk_states_from_smu()1393 if (num_entries_per_clk->num_fclk_levels && clk_mgr_base->bw_params->dc_mode_limit.fclk_mhz == in dcn401_get_memclk_states_from_smu()1394 clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_fclk_levels - 1].fclk_mhz) in dcn401_get_memclk_states_from_smu()1397 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn401_get_memclk_states_from_smu()1400 num_levels = num_entries_per_clk->num_fclk_levels; in dcn401_get_memclk_states_from_smu()
512 int dramclk_khz_override, fclk_khz_override, num_fclk_levels; in dcn32_auto_dpm_test_log() local541 num_fclk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_fclk_levels - 1; in dcn32_auto_dpm_test_log()547 … fclk_khz_override = clk_mgr->base.bw_params->clk_table.entries[num_fclk_levels].fclk_mhz * 1000; in dcn32_auto_dpm_test_log()1047 &num_entries_per_clk->num_fclk_levels); in dcn32_get_memclk_states_from_smu()1050 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn32_get_memclk_states_from_smu()1053 num_levels = num_entries_per_clk->num_fclk_levels; in dcn32_get_memclk_states_from_smu()
181 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn401_update_bw_bounding_box_fpu()182 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn401_update_bw_bounding_box_fpu()205 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; i++) { in dcn401_update_bw_bounding_box_fpu()
404 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()872 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn321_update_bw_bounding_box_fpu()873 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn321_update_bw_bounding_box_fpu()897 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; i++) { in dcn321_update_bw_bounding_box_fpu()
167 unsigned int num_fclk_levels; member
530 for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels; i++) { in dml2_init_soc_states()
120 unsigned int num_fclk_levels; member
376 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn35_update_bw_bounding_box_fpu()
409 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn351_update_bw_bounding_box_fpu()
122 if (dc_clk_table->num_entries_per_clk.num_fclk_levels) { in dml21_apply_soc_bb_overrides()123 dml_clk_table->fclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_fclk_levels; in dml21_apply_soc_bb_overrides()
2857 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()3318 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels = in dcn32_update_bw_bounding_box_fpu()3319 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; in dcn32_update_bw_bounding_box_fpu()3342 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels; i++) { in dcn32_update_bw_bounding_box_fpu()
1018 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = clock_table->NumFclkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
150 …(dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_fclk_levels && dc->clk_mgr->bw_params->… in dcn401_init_hw()