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Searched refs:num_dsc (Results 1 – 25 of 48) sorted by relevance

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/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_rm.c521 int num_dsc = 0; in _dpu_rm_dsc_alloc() local
527 num_dsc < top->num_dsc; dsc_idx++) { in _dpu_rm_dsc_alloc()
543 num_dsc++; in _dpu_rm_dsc_alloc()
547 if (num_dsc < top->num_dsc) { in _dpu_rm_dsc_alloc()
549 num_dsc, top->num_dsc); in _dpu_rm_dsc_alloc()
561 int num_dsc = 0; in _dpu_rm_dsc_alloc_pair() local
567 num_dsc < top->num_dsc; dsc_idx += 2) { in _dpu_rm_dsc_alloc_pair()
599 num_dsc += 2; in _dpu_rm_dsc_alloc_pair()
603 if (num_dsc < top->num_dsc) { in _dpu_rm_dsc_alloc_pair()
605 num_dsc, top->num_dsc); in _dpu_rm_dsc_alloc_pair()
[all …]
H A Ddpu_encoder.c632 num_dsc++; in dpu_encoder_use_dsc_merge()
634 return (num_dsc > 0) && (num_dsc > intf_count); in dpu_encoder_use_dsc_merge()
689 topology->num_dsc = 2; in dpu_encoder_update_topology()
691 topology->num_dsc = 1; in dpu_encoder_update_topology()
1160 int num_ctl, num_pp, num_dsc; in dpu_encoder_virt_atomic_mode_set() local
1222 for (i = 0; i < num_dsc; i++) { in dpu_encoder_virt_atomic_mode_set()
2015 int num_dsc = 0; in dpu_encoder_prep_dsc() local
2025 num_dsc++; in dpu_encoder_prep_dsc()
2031 if (num_dsc > 1) in dpu_encoder_prep_dsc()
2041 enc_ip_w = intf_ip_w / num_dsc; in dpu_encoder_prep_dsc()
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H A Ddpu_rm.h62 u32 num_dsc; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_soc_parameter_types.h166 unsigned int num_dsc; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4.c58 .num_dsc = 4,
84 ip_caps->num_dsc = ip_params->num_dsc; in patch_ip_caps_with_explicit_ip_params()
109 ip_params->num_dsc = ip_caps->num_dsc; in patch_ip_params_with_ip_caps()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/
H A Ddcn4_soc_bb.h338 .num_dsc = 4,
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c76 .num_dsc = 3,
221 .num_dsc = 3,
320 .num_dsc = 3,
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c665 .num_dsc = 6,
703 .num_dsc = 5,
1093 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_destruct()
1338 if (pool->res_cap->num_dsc == pool->res_cap->num_opp) { in dcn20_acquire_dsc()
1352 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_acquire_dsc()
1366 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_release_dsc()
2695 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h54 int num_dsc; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.c44 .num_dsc = 5,
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h272 unsigned int num_dsc; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.c43 .num_dsc = 2,
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c129 .num_dsc = 2,
951 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_destruct()
1365 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c131 .num_dsc = 5,
1006 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_destruct()
1432 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c91 out->num_dsc = 4; in dml2_init_ip_params()
129 out->num_dsc = 4; in dml2_init_ip_params()
226 out->num_dsc = 4; in dml2_init_ip_params()
658 out->num_dsc = in_ip_params->num_dsc; in dml2_translate_ip_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c883 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { in dcn35_init_pipes()
1251 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { in dcn35_hw_block_power_down()
1319 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) in dcn35_hw_block_power_up()
1372 for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { in dcn35_root_clock_control()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c651 .num_dsc = 3,
1055 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_destruct()
1655 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c581 .num_dsc = 3,
664 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_destruct()
1656 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c57 .num_dsc = 4,
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c46 .num_dsc = 3,
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c821 .num_dsc = 3,
1381 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_destruct()
1957 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c839 .num_dsc = 4,
1442 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_destruct()
2060 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c61 .num_dsc = 4,
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c40 .num_dsc = 4,
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c681 .num_dsc = 4,
1454 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn35_resource_destruct()
2092 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn35_resource_construct()

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