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Searched refs:nfe (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/crypto/hisilicon/hpre/
H A Dhpre_main.c774 u32 ce, nfe; in hpre_hw_error_disable() local
777 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_hw_error_disable()
780 writel(ce | nfe | HPRE_HAC_RAS_FE_ENABLE, qm->io_base + HPRE_INT_MASK); in hpre_hw_error_disable()
787 u32 ce, nfe, err_en; in hpre_hw_error_enable() local
790 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_hw_error_enable()
793 writel(ce | nfe | HPRE_HAC_RAS_FE_ENABLE, qm->io_base + HPRE_HAC_SOURCE_INT); in hpre_hw_error_enable()
797 writel(nfe, qm->io_base + HPRE_RAS_NFE_ENB); in hpre_hw_error_enable()
804 err_en = ce | nfe | HPRE_HAC_RAS_FE_ENABLE; in hpre_hw_error_enable()
1415 err_info->nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_QM_NFE_MASK_CAP, qm->cap_ver); in hpre_err_info_init()
/linux-6.15/drivers/crypto/hisilicon/zip/
H A Dzip_main.c610 u32 nfe, ce; in hisi_zip_hw_error_enable() local
619 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_enable()
623 writel(ce | nfe | HZIP_CORE_INT_RAS_FE_ENB_MASK, qm->io_base + HZIP_CORE_INT_SOURCE); in hisi_zip_hw_error_enable()
628 writel(nfe, qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); in hisi_zip_hw_error_enable()
640 u32 nfe, ce; in hisi_zip_hw_error_disable() local
643 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_disable()
645 writel(ce | nfe | HZIP_CORE_INT_RAS_FE_ENB_MASK, qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_disable()
1205 err_info->nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, in hisi_zip_err_info_init()
/linux-6.15/drivers/crypto/hisilicon/sec2/
H A Dsec_main.c684 u32 ce, nfe; in sec_hw_error_enable() local
693 nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); in sec_hw_error_enable()
696 writel(ce | nfe | SEC_RAS_FE_ENB_MSK, qm->io_base + SEC_CORE_INT_SOURCE); in sec_hw_error_enable()
701 writel(nfe, qm->io_base + SEC_RAS_NFE_REG); in sec_hw_error_enable()
707 writel(ce | nfe | SEC_RAS_FE_ENB_MSK, qm->io_base + SEC_CORE_INT_MASK); in sec_hw_error_enable()
1117 err_info->nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_QM_NFE_MASK_CAP, qm->cap_ver); in sec_err_info_init()
/linux-6.15/include/linux/
H A Dhisi_acc_qm.h251 u32 nfe; member
/linux-6.15/drivers/crypto/hisilicon/
H A Dqm.c1401 qm->error_mask = err_info->nfe | err_info->ce | err_info->fe; in qm_hw_error_cfg()
1408 writel(err_info->nfe, qm->io_base + QM_RAS_NFE_ENABLE); in qm_hw_error_cfg()
1510 writel(qm->err_info.nfe & (~error_status), in qm_hw_error_handle_v2()
1517 writel(qm->err_info.nfe, qm->io_base + QM_RAS_NFE_ENABLE); in qm_hw_error_handle_v2()