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Searched refs:native_wrmsrl (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/arch/x86/include/asm/
H A Dmicrocode.h66 native_wrmsrl(MSR_IA32_UCODE_REV, 0); in intel_get_microcode_revision()
H A Dspec-ctrl.h87 native_wrmsrl(MSR_IA32_SPEC_CTRL, val); in __update_spec_ctrl()
H A Dmsr.h112 #define native_wrmsrl(msr, val) \ macro
/linux-6.15/arch/x86/kernel/cpu/microcode/
H A Dintel.c323 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); in __apply_microcode()
H A Damd.c610 native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr); in __apply_microcode_amd()
/linux-6.15/arch/x86/hyperv/
H A Divm.c118 native_wrmsrl(MSR_AMD64_SEV_ES_GHCB, val); in wr_ghcb_msr()
/linux-6.15/arch/x86/kvm/vmx/
H A Dvmx.c385 native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, msr); in vmx_disable_fb_clear()
396 native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl); in vmx_enable_fb_clear()
6748 native_wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH); in vmx_l1d_flush()
7321 native_wrmsrl(MSR_IA32_SPEC_CTRL, hostval); in vmx_spec_ctrl_restore_host()