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Searched refs:nCur40MhzPrimeSC (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_phycfg.c606 if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) in phy_GetSecondaryChnl_8723B()
608 else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) in phy_GetSecondaryChnl_8723B()
648 PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); in phy_PostSetBwMode8723B()
650 PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); in phy_PostSetBwMode8723B()
652 …PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_L… in phy_PostSetBwMode8723B()
709 u8 tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC; in PHY_HandleSwChnlAndSetBW8723B()
740 pHalData->nCur40MhzPrimeSC = ExtChnlOffsetOf40MHz; in PHY_HandleSwChnlAndSetBW8723B()
756 pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC; in PHY_HandleSwChnlAndSetBW8723B()
H A Drtl8723b_dm.c93 ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); in Update_ODM_ComInfo_8723b()
H A Drtl8723b_hal_init.c1962 if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) { in SCMapping_8723B()
1964 } else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) { in SCMapping_8723B()
/linux-6.15/drivers/staging/rtl8723bs/include/
H A Dhal_data.h180 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */ member