Searched refs:mplla (Results 1 – 2 of 2) sorted by relevance
892 .mplla = { 0x3104, /* mplla cfg0 */941 .mplla = { 0x3104, /* mplla cfg0 */2397 frac_quot = pll_state->mplla[8]; in intel_c20pll_calc_port_clock()2398 frac_rem = pll_state->mplla[9]; in intel_c20pll_calc_port_clock()2399 frac_den = pll_state->mplla[7]; in intel_c20pll_calc_port_clock()2505 hw_state->mplla[i]); in intel_c20pll_dump_hw_state()2680 pll_state->mplla[i]); in intel_c20_pll_program()2684 pll_state->mplla[i]); in intel_c20_pll_program()3451 if (memcmp(&a->mplla, &b->mplla, sizeof(a->mplla)) != 0) in mtl_compare_hw_state_c20()3515 INTEL_DISPLAY_STATE_WARN(display, mpll_hw_state->mplla[i] != mpll_sw_state->mplla[i], in intel_c20pll_state_verify()[all …]
255 u16 mplla[10]; member