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Searched refs:mmSQ_IND_DATA (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1436 #define mmSQ_IND_DATA 0x2379 macro
H A Dgfx_7_0_d.h1902 #define mmSQ_IND_DATA 0x2379 macro
H A Dgfx_7_2_d.h1923 #define mmSQ_IND_DATA 0x2379 macro
H A Dgfx_8_0_d.h2121 #define mmSQ_IND_DATA 0x2379 macro
H A Dgfx_8_1_d.h2089 #define mmSQ_IND_DATA 0x2379 macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2967 return RREG32(mmSQ_IND_DATA); in wave_read_ind()
2982 *(out++) = RREG32(mmSQ_IND_DATA); in wave_read_regs()
H A Dgfx_v7_0.c4062 return RREG32(mmSQ_IND_DATA); in wave_read_ind()
4077 *(out++) = RREG32(mmSQ_IND_DATA); in wave_read_regs()
H A Dgfx_v8_0.c5183 return RREG32(mmSQ_IND_DATA); in wave_read_ind()
5198 *(out++) = RREG32(mmSQ_IND_DATA); in wave_read_regs()
H A Dgfx_v9_0.c1936 return RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_ind()
1951 *(out++) = RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_regs()
H A Dgfx_v10_0.c4480 return RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_ind()
4493 *(out++) = RREG32_SOC15(GC, 0, mmSQ_IND_DATA); in wave_read_regs()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h461 #define mmSQ_IND_DATA … macro
H A Dgc_9_1_offset.h455 #define mmSQ_IND_DATA … macro
H A Dgc_9_2_1_offset.h445 #define mmSQ_IND_DATA … macro
H A Dgc_10_1_0_offset.h2531 #define mmSQ_IND_DATA … macro
H A Dgc_10_3_0_offset.h2622 #define mmSQ_IND_DATA … macro