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Searched refs:mmRLC_UTCL1_STATUS (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6281 #define mmRLC_UTCL1_STATUS … macro
H A Dgc_9_1_offset.h6503 #define mmRLC_UTCL1_STATUS … macro
H A Dgc_9_2_1_offset.h6479 #define mmRLC_UTCL1_STATUS … macro
H A Dgc_10_1_0_offset.h9615 #define mmRLC_UTCL1_STATUS … macro
H A Dgc_10_3_0_offset.h9447 #define mmRLC_UTCL1_STATUS … macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c201 SOC15_REG_ENTRY_STR(GC, 0, mmRLC_UTCL1_STATUS),
H A Dgfx_v10_0.c331 SOC15_REG_ENTRY_STR(GC, 0, mmRLC_UTCL1_STATUS),