Home
last modified time | relevance | path

Searched refs:mmRLC_PG_ALWAYS_ON_WGP_MASK (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c2248 tmp = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_ALWAYS_ON_WGP_MASK)); in vangogh_post_smu_init()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h9413 #define mmRLC_PG_ALWAYS_ON_WGP_MASK … macro
H A Dgc_10_3_0_offset.h9235 #define mmRLC_PG_ALWAYS_ON_WGP_MASK … macro