Home
last modified time | relevance | path

Searched refs:mmRLC_CNTL (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h49 { 0x00000000, mmRLC_CNTL },
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2434 tmp = RREG32(mmRLC_CNTL); in gfx_v6_0_update_rlc()
2436 WREG32(mmRLC_CNTL, rlc); in gfx_v6_0_update_rlc()
2443 orig = data = RREG32(mmRLC_CNTL); in gfx_v6_0_halt_rlc()
2447 WREG32(mmRLC_CNTL, data); in gfx_v6_0_halt_rlc()
2457 WREG32(mmRLC_CNTL, 0); in gfx_v6_0_rlc_stop()
2465 WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v6_0_rlc_start()
H A Dgfx_v7_0.c3296 tmp = RREG32(mmRLC_CNTL); in gfx_v7_0_update_rlc()
3298 WREG32(mmRLC_CNTL, rlc); in gfx_v7_0_update_rlc()
3305 orig = data = RREG32(mmRLC_CNTL); in gfx_v7_0_halt_rlc()
3311 WREG32(mmRLC_CNTL, data); in gfx_v7_0_halt_rlc()
3369 WREG32(mmRLC_CNTL, 0); in gfx_v7_0_rlc_stop()
3385 WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v7_0_rlc_start()
H A Dgfx_v8_0.c5514 rlc_setting = RREG32(mmRLC_CNTL); in gfx_v8_0_is_rlc_enabled()
5525 data = RREG32(mmRLC_CNTL); in gfx_v8_0_set_safe_mode()
5553 data = RREG32(mmRLC_CNTL); in gfx_v8_0_unset_safe_mode()
H A Dgfx_v10_0.c5432 u32 tmp = RREG32_SOC15(GC, 0, mmRLC_CNTL); in gfx_v10_0_rlc_stop()
5435 WREG32_SOC15(GC, 0, mmRLC_CNTL, tmp); in gfx_v10_0_rlc_stop()
5834 tmp = RREG32_SOC15(GC, 0, mmRLC_CNTL); in gfx_v10_0_rlc_backdoor_autoload_enable()
7823 rlc_cntl = RREG32_SOC15(GC, 0, mmRLC_CNTL); in gfx_v10_0_is_rlc_enabled()
H A Dgfx_v9_0.c4866 rlc_setting = RREG32_SOC15(GC, 0, mmRLC_CNTL); in gfx_v9_0_is_rlc_enabled()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1136 #define mmRLC_CNTL 0x30C0 macro
H A Dgfx_7_0_d.h1240 #define mmRLC_CNTL 0x30c0 macro
H A Dgfx_7_2_d.h1253 #define mmRLC_CNTL 0x30c0 macro
H A Dgfx_8_0_d.h1342 #define mmRLC_CNTL 0xec00 macro
H A Dgfx_8_1_d.h1345 #define mmRLC_CNTL 0xec00 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h5963 #define mmRLC_CNTL … macro
H A Dgc_9_1_offset.h6185 #define mmRLC_CNTL … macro
H A Dgc_9_2_1_offset.h6149 #define mmRLC_CNTL … macro
H A Dgc_10_1_0_offset.h9293 #define mmRLC_CNTL … macro
H A Dgc_10_3_0_offset.h9095 #define mmRLC_CNTL … macro