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Searched refs:mmPHYPLLF_PIXCLK_RESYNC_CNTL (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_2_d.h1074 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL 0x13e macro
H A Ddce_12_0_offset.h768 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h568 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_2_0_0_offset.h206 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_0_0_offset.h188 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL … macro