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Searched refs:mmOTG2_OTG_INTERRUPT_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7008 #define mmOTG2_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_2_1_0_offset.h8453 #define mmOTG2_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_1_0_offset.h6803 #define mmOTG2_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_2_offset.h8357 #define mmOTG2_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_2_0_0_offset.h9484 #define mmOTG2_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_0_offset.h9215 #define mmOTG2_OTG_INTERRUPT_CONTROL … macro