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Searched refs:mmMPC_CLOCK_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h3741 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h6563 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h11093 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h5871 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h5490 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h13639 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h6809 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h15162 #define mmMPC_CLOCK_CONTROL_BASE_IDX … macro