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Searched refs:mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h3848 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_0_3_offset.h6232 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_0_1_offset.h10402 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_2_1_0_offset.h6000 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_0_2_offset.h12768 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_2_0_0_offset.h6978 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_0_0_offset.h14111 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G … macro