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Searched refs:mmMPCC2_MPCC_TOP_GAIN_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h3652 #define mmMPCC2_MPCC_TOP_GAIN_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h10321 #define mmMPCC2_MPCC_TOP_GAIN_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h5679 #define mmMPCC2_MPCC_TOP_GAIN_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h12655 #define mmMPCC2_MPCC_TOP_GAIN_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h6617 #define mmMPCC2_MPCC_TOP_GAIN_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h13966 #define mmMPCC2_MPCC_TOP_GAIN_BASE_IDX … macro