Searched refs:mmGDS_OA_VMID0 (Results 1 – 13 of 13) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 2265 #define mmGDS_OA_VMID0 0x3330 macro
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| H A D | gfx_7_2_d.h | 2287 #define mmGDS_OA_VMID0 0x3330 macro
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| H A D | gfx_8_0_d.h | 2485 #define mmGDS_OA_VMID0 0x3330 macro
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| H A D | gfx_8_1_d.h | 2464 #define mmGDS_OA_VMID0 0x3330 macro
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| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_0.c | 2598 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v9_0_init_compute_vmid()
2616 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid()
4311 SOC15_REG_OFFSET(GC, 0, mmGDS_OA_VMID0) + vmid, in gfx_v9_0_ring_emit_gds_switch()
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| H A D | gfx_v10_0.c | 5190 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
5211 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()
7750 SOC15_REG_OFFSET(GC, 0, mmGDS_OA_VMID0) + vmid, in gfx_v10_0_ring_emit_gds_switch()
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| H A D | gfx_v7_0.c | 94 {mmGDS_VMID0_BASE, mmGDS_VMID0_SIZE, mmGDS_GWS_VMID0, mmGDS_OA_VMID0},
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| H A D | gfx_v8_0.c | 179 {mmGDS_VMID0_BASE, mmGDS_VMID0_SIZE, mmGDS_GWS_VMID0, mmGDS_OA_VMID0},
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| /linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 3139 #define mmGDS_OA_VMID0 … macro
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| H A D | gc_9_1_offset.h | 3369 #define mmGDS_OA_VMID0 … macro
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| H A D | gc_9_2_1_offset.h | 3319 #define mmGDS_OA_VMID0 … macro
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| H A D | gc_10_1_0_offset.h | 5639 #define mmGDS_OA_VMID0 … macro
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| H A D | gc_10_3_0_offset.h | 5264 #define mmGDS_OA_VMID0 … macro
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