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Searched refs:mmGC_USER_RB_BACKEND_DISABLE (Results 1 – 18 of 18) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dcik.c1115 {mmGC_USER_RB_BACKEND_DISABLE, true},
1134 case mmGC_USER_RB_BACKEND_DISABLE: in cik_get_register_value()
H A Dvi.c739 {mmGC_USER_RB_BACKEND_DISABLE, true},
757 case mmGC_USER_RB_BACKEND_DISABLE: in vi_get_register_value()
H A Dsi.c1160 {mmGC_USER_RB_BACKEND_DISABLE, true},
1176 case mmGC_USER_RB_BACKEND_DISABLE: in si_get_register_value()
H A Dgfx_v6_0.c1331 RREG32(mmGC_USER_RB_BACKEND_DISABLE); in gfx_v6_0_get_rb_active_bitmap()
1508 RREG32(mmGC_USER_RB_BACKEND_DISABLE); in gfx_v6_0_setup_rb()
H A Dgfx_v7_0.c1594 data |= RREG32(mmGC_USER_RB_BACKEND_DISABLE); in gfx_v7_0_get_rb_active_bitmap()
1799 RREG32(mmGC_USER_RB_BACKEND_DISABLE); in gfx_v7_0_setup_rb()
H A Dgfx_v8_0.c3444 RREG32(mmGC_USER_RB_BACKEND_DISABLE); in gfx_v8_0_get_rb_active_bitmap()
3650 RREG32(mmGC_USER_RB_BACKEND_DISABLE); in gfx_v8_0_setup_rb()
H A Dgfx_v9_0.c2505 data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE); in gfx_v9_0_get_rb_active_bitmap()
H A Dgfx_v10_0.c5050 data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE); in gfx_v10_0_get_rb_active_bitmap()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h691 #define mmGC_USER_RB_BACKEND_DISABLE 0x26DF macro
H A Dgfx_7_0_d.h687 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df macro
H A Dgfx_7_2_d.h700 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df macro
H A Dgfx_8_0_d.h772 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df macro
H A Dgfx_8_1_d.h772 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1059 #define mmGC_USER_RB_BACKEND_DISABLE … macro
H A Dgc_9_1_offset.h1029 #define mmGC_USER_RB_BACKEND_DISABLE … macro
H A Dgc_9_2_1_offset.h995 #define mmGC_USER_RB_BACKEND_DISABLE … macro
H A Dgc_10_1_0_offset.h2983 #define mmGC_USER_RB_BACKEND_DISABLE … macro
H A Dgc_10_3_0_offset.h2950 #define mmGC_USER_RB_BACKEND_DISABLE … macro