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Searched refs:mmDSCL5_SCL_COEF_RAM_TAP_DATA (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_0_offset.h15536 #define mmDSCL5_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_0_0_offset.h7413 #define mmDSCL5_SCL_COEF_RAM_TAP_DATA … macro