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Searched refs:mmDSCL0_DSCL_MEM_PWR_STATUS (Results 1 – 8 of 8) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h1493 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_3_offset.h2607 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_1_offset.h3418 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_2_1_0_offset.h3424 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_1_0_offset.h3572 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_2_offset.h3963 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_2_0_0_offset.h4362 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_0_offset.h4014 #define mmDSCL0_DSCL_MEM_PWR_STATUS … macro