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Searched refs:mmDSCC4_DSCC_INTERRUPT_CONTROL_STATUS (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h12039 #define mmDSCC4_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_3_0_2_offset.h12204 #define mmDSCC4_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_2_0_0_offset.h14170 #define mmDSCC4_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_3_0_0_offset.h13368 #define mmDSCC4_DSCC_INTERRUPT_CONTROL_STATUS … macro