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Searched refs:mmDSCC3_DSCC_PPS_CONFIG5_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h11921 #define mmDSCC3_DSCC_PPS_CONFIG5_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h12069 #define mmDSCC3_DSCC_PPS_CONFIG5_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h14051 #define mmDSCC3_DSCC_PPS_CONFIG5_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h13233 #define mmDSCC3_DSCC_PPS_CONFIG5_BASE_IDX … macro