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Searched refs:mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h11272 #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_1_0_offset.h9688 #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h11024 #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h12357 #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h12168 #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h11435 #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro