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Searched refs:mmDC_I2C_DDC5_SPEED_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h9296 #define mmDC_I2C_DDC5_SPEED_BASE_IDX … macro
H A Ddcn_1_0_offset.h7704 #define mmDC_I2C_DDC5_SPEED_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9002 #define mmDC_I2C_DDC5_SPEED_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h10329 #define mmDC_I2C_DDC5_SPEED_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10086 #define mmDC_I2C_DDC5_SPEED_BASE_IDX … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1673 #define mmDC_I2C_DDC5_SPEED_BASE_IDX … macro