Home
last modified time | relevance | path

Searched refs:mmDC_I2C_DDC5_SETUP_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h9298 #define mmDC_I2C_DDC5_SETUP_BASE_IDX … macro
H A Ddcn_1_0_offset.h7706 #define mmDC_I2C_DDC5_SETUP_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9004 #define mmDC_I2C_DDC5_SETUP_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h10331 #define mmDC_I2C_DDC5_SETUP_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10088 #define mmDC_I2C_DDC5_SETUP_BASE_IDX … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1675 #define mmDC_I2C_DDC5_SETUP_BASE_IDX … macro