Searched refs:mmCP_ME_IC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 5851 tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_me_cache()
5853 WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_me_cache()
5857 tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_me_cache()
6253 tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_me_microcode()
6255 WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp); in gfx_v10_0_cp_gfx_load_me_microcode()
6259 tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_me_microcode()
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| /linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 10279 #define mmCP_ME_IC_OP_CNTL … macro
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| H A D | gc_10_3_0_offset.h | 9989 #define mmCP_ME_IC_OP_CNTL … macro
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