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Searched refs:mmCP_HQD_QUEUE_PRIORITY (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h573 #define mmCP_HQD_QUEUE_PRIORITY 0x324b macro
H A Dgfx_7_2_d.h586 #define mmCP_HQD_QUEUE_PRIORITY 0x324b macro
H A Dgfx_8_0_d.h636 #define mmCP_HQD_QUEUE_PRIORITY 0x324b macro
H A Dgfx_8_1_d.h636 #define mmCP_HQD_QUEUE_PRIORITY 0x324b macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2831 #define mmCP_HQD_QUEUE_PRIORITY … macro
H A Dgc_9_1_offset.h3059 #define mmCP_HQD_QUEUE_PRIORITY … macro
H A Dgc_9_2_1_offset.h3015 #define mmCP_HQD_QUEUE_PRIORITY … macro
H A Dgc_10_1_0_offset.h5315 #define mmCP_HQD_QUEUE_PRIORITY … macro
H A Dgc_10_3_0_offset.h4948 #define mmCP_HQD_QUEUE_PRIORITY … macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c2933 mqd->cp_hqd_queue_priority = RREG32(mmCP_HQD_QUEUE_PRIORITY); in gfx_v7_0_mqd_init()
H A Dgfx_v9_0.c247 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_QUEUE_PRIORITY),
H A Dgfx_v10_0.c389 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_QUEUE_PRIORITY),