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Searched refs:mmCP_HQD_PQ_WPTR_POLL_ADDR (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h1509 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
1519 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
1529 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
1539 { 0x540fee20, mmCP_HQD_PQ_WPTR_POLL_ADDR },
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10_3.c253 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in hqd_load_v10_3()
H A Damdgpu_amdkfd_gfx_v10.c267 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in kgd_hqd_load()
H A Damdgpu_amdkfd_gfx_v9.c281 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_POLL_ADDR, in kgd_gfx_v9_hqd_load()
H A Dgfx_v9_0.c252 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR),
3720 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v9_0_kiq_init_register()
H A Dgfx_v10_0.c394 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR),
7055 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v10_0_kiq_init_register()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h580 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_7_2_d.h593 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_8_0_d.h643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_8_1_d.h643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2845 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
H A Dgc_9_1_offset.h3073 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
H A Dgc_9_2_1_offset.h3029 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
H A Dgc_10_1_0_offset.h5329 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro
H A Dgc_10_3_0_offset.h4962 #define mmCP_HQD_PQ_WPTR_POLL_ADDR … macro