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Searched refs:mmCP_HQD_CTX_SAVE_BASE_ADDR_LO (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h676 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO 0x3270 macro
H A Dgfx_8_1_d.h676 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO 0x3270 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2909 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO … macro
H A Dgc_9_1_offset.h3137 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO … macro
H A Dgc_9_2_1_offset.h3093 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO … macro
H A Dgc_10_1_0_offset.h5393 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO … macro
H A Dgc_10_3_0_offset.h5026 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO … macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c4544 mqd->cp_hqd_ctx_save_base_addr_lo = RREG32(mmCP_HQD_CTX_SAVE_BASE_ADDR_LO); in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c267 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_BASE_ADDR_LO),
H A Dgfx_v10_0.c409 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_BASE_ADDR_LO),