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Searched refs:mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h3542 #define mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h5979 #define mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h5547 #define mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h6523 #define mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h6485 #define mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h6574 #define mmCM3_CM_MEM_PWR_CTRL2_BASE_IDX … macro