| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | dml1_display_rq_dlg_calc.c | 1025 double min_ttu_vblank; in dml1_rq_dlg_get_dlg_params() local 1164 min_ttu_vblank = dlg_sys_param->t_urg_wm_us; in dml1_rq_dlg_get_dlg_params() 1166 min_ttu_vblank = dml_max(dlg_sys_param->t_sr_wm_us, min_ttu_vblank); in dml1_rq_dlg_get_dlg_params() 1168 min_ttu_vblank = dml_max(dlg_sys_param->t_mclk_wm_us, min_ttu_vblank); in dml1_rq_dlg_get_dlg_params() 1169 min_ttu_vblank = min_ttu_vblank + t_calc_us; in dml1_rq_dlg_get_dlg_params() 1171 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml1_rq_dlg_get_dlg_params() 1179 DTRACE("DLG: %s: min_ttu_vblank = %3.2f", __func__, min_ttu_vblank); in dml1_rq_dlg_get_dlg_params() 1917 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml1_rq_dlg_get_dlg_params() 1918 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml1_rq_dlg_get_dlg_params()
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| H A D | display_rq_dlg_helpers.c | 329 ttu_regs->min_ttu_vblank); in print__ttu_regs_st()
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| H A D | display_mode_structs.h | 678 unsigned int min_ttu_vblank; member
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| H A D | display_mode_vba.h | 80 dml_get_pipe_attr_decl(min_ttu_vblank);
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml_display_rq_dlg_calc.c | 266 dml_float_t min_ttu_vblank; in dml_rq_dlg_get_dlg_reg() local 322 min_ttu_vblank = dml_get_min_ttu_vblank_in_us(mode_lib, pipe_idx); in dml_rq_dlg_get_dlg_reg() 325 dml_print("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, min_ttu_vblank); in dml_rq_dlg_get_dlg_reg() 501 disp_ttu_regs->min_ttu_vblank = (dml_uint_t)(min_ttu_vblank * refclk_freq_in_mhz); in dml_rq_dlg_get_dlg_reg() 557 ASSERT(disp_ttu_regs->min_ttu_vblank < (dml_uint_t) dml_pow(2, 24)); in dml_rq_dlg_get_dlg_reg()
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| H A D | display_mode_util.c | 306 dml_print("DML: min_ttu_vblank = 0x%x\n", ttu_regs->min_ttu_vblank); in dml_print_ttu_regs_st()
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| H A D | dml2_translation_helper.c | 1525 out->ttu_regs.min_ttu_vblank = disp_ttu_regs->min_ttu_vblank; in dml2_update_pipe_ctx_dchub_regs()
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| H A D | display_mode_core_structs.h | 1982 dml_uint_t min_ttu_vblank; member
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_rq_dlg_calc_32.c | 226 double min_ttu_vblank; in dml32_rq_dlg_get_dlg_reg() local 279 …min_ttu_vblank = get_min_ttu_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From … in dml32_rq_dlg_get_dlg_reg() 282 dml_print("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, min_ttu_vblank); in dml32_rq_dlg_get_dlg_reg() 552 ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml32_rq_dlg_get_dlg_reg() 609 ASSERT(ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml32_rq_dlg_get_dlg_reg()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 157 … (s->min_ttu_vblank * frac) / ref_clk_mhz / frac, (s->min_ttu_vblank * frac) / ref_clk_mhz % frac, in dcn10_get_hubp_states() 177 … (s->min_ttu_vblank * frac) / ref_clk_mhz / frac, (s->min_ttu_vblank * frac) / ref_clk_mhz % frac, in dcn10_get_hubp_states() 312 …>hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank, in dcn10_get_ttu_states()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 861 double min_ttu_vblank; in dml_rq_dlg_get_dlg_params() local 977 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params() 979 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml_rq_dlg_get_dlg_params() 992 min_ttu_vblank); in dml_rq_dlg_get_dlg_params() 1630 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params() 1631 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20.c | 815 double min_ttu_vblank; in dml20_rq_dlg_get_dlg_params() local 931 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20_rq_dlg_get_dlg_params() 933 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml20_rq_dlg_get_dlg_params() 944 min_ttu_vblank); in dml20_rq_dlg_get_dlg_params() 1522 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml20_rq_dlg_get_dlg_params() 1523 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml20_rq_dlg_get_dlg_params()
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| H A D | display_rq_dlg_calc_20v2.c | 815 double min_ttu_vblank; in dml20v2_rq_dlg_get_dlg_params() local 931 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20v2_rq_dlg_get_dlg_params() 933 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml20v2_rq_dlg_get_dlg_params() 945 min_ttu_vblank); in dml20v2_rq_dlg_get_dlg_params() 1523 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml20v2_rq_dlg_get_dlg_params() 1524 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml20v2_rq_dlg_get_dlg_params()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 927 double min_ttu_vblank = 0; in dml_rq_dlg_get_dlg_params() local 1045 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params() 1047 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double)htotal; in dml_rq_dlg_get_dlg_params() 1059 min_ttu_vblank); in dml_rq_dlg_get_dlg_params() 1719 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params() 1720 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_rq_dlg_calc_31.c | 883 double min_ttu_vblank; in dml_rq_dlg_get_dlg_params() local 980 …min_ttu_vblank = get_min_ttu_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From … in dml_rq_dlg_get_dlg_params() 987 dml_print("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, min_ttu_vblank); in dml_rq_dlg_get_dlg_params() 1536 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params() 1537 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| H A D | dml_top_dchub_registers.h | 64 uint32_t min_ttu_vblank; member
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_rq_dlg_calc_314.c | 968 double min_ttu_vblank; in dml_rq_dlg_get_dlg_params() local 1065 …min_ttu_vblank = get_min_ttu_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From … in dml_rq_dlg_get_dlg_params() 1074 dml_print("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, min_ttu_vblank); in dml_rq_dlg_get_dlg_params() 1624 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params() 1625 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml_rq_dlg_get_dlg_params()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| H A D | dcn401_hubp.c | 367 MIN_TTU_VBLANK, pipe_regs->ttu_regs.min_ttu_vblank, in hubp401_setup_interdependent() 902 MIN_TTU_VBLANK, &ttu_attr->min_ttu_vblank, in hubp401_read_state() 959 MIN_TTU_VBLANK, &s->min_ttu_vblank); in hubp401_read_state()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.c | 747 MIN_TTU_VBLANK, ttu_attr->min_ttu_vblank, in hubp1_setup_interdependent() 1016 MIN_TTU_VBLANK, &ttu_attr->min_ttu_vblank, in hubp1_read_state_common() 1073 MIN_TTU_VBLANK, &s->min_ttu_vblank); in hubp1_read_state_common()
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| H A D | dcn10_hubp.h | 686 uint32_t min_ttu_vblank; member
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 293 MIN_TTU_VBLANK, ttu_attr->min_ttu_vblank, in hubp2_setup_interdependent() 1247 MIN_TTU_VBLANK, &ttu_attr->min_ttu_vblank, in hubp2_read_state_common() 1304 MIN_TTU_VBLANK, &s->min_ttu_vblank); in hubp2_read_state_common()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 2579 || (old_ttu_regs.min_ttu_vblank != new_ttu_regs->min_ttu_vblank) in dcn401_detect_pipe_changes() 2596 old_ttu_regs.min_ttu_vblank = new_ttu_regs->min_ttu_vblank; in dcn401_detect_pipe_changes()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 1624 old_ttu_attr.min_ttu_vblank != new_ttu_attr->min_ttu_vblank || in dcn20_detect_pipe_changes() 1642 old_ttu_attr.min_ttu_vblank = new_ttu_attr->min_ttu_vblank; in dcn20_detect_pipe_changes()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| H A D | dml2_core_shared_types.h | 1438 double min_ttu_vblank; member
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 201 DTN_INFO_MICRO_SEC(s->min_ttu_vblank); in dcn10_log_hubp_states() 276 …>hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank, in dcn10_log_hubp_states()
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