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Searched refs:min_pll_rate (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_7nm.c545 if (rate < pll_7nm->phy->cfg->min_pll_rate) in dsi_pll_7nm_clk_round_rate()
546 return pll_7nm->phy->cfg->min_pll_rate; in dsi_pll_7nm_clk_round_rate()
1174 .min_pll_rate = 600000000UL,
1194 .min_pll_rate = 600000000UL,
1217 .min_pll_rate = 1000000000UL,
1235 .min_pll_rate = 600000000UL,
1258 .min_pll_rate = 600000000UL,
1281 .min_pll_rate = 600000000UL,
1304 .min_pll_rate = 600000000UL,
1327 .min_pll_rate = 600000000UL,
H A Ddsi_phy_28nm.c541 if (rate < pll_28nm->phy->cfg->min_pll_rate) in dsi_pll_28nm_clk_round_rate()
542 return pll_28nm->phy->cfg->min_pll_rate; in dsi_pll_28nm_clk_round_rate()
882 .min_pll_rate = VCO_MIN_RATE,
899 .min_pll_rate = VCO_MIN_RATE,
916 .min_pll_rate = VCO_MIN_RATE,
934 .min_pll_rate = VCO_MIN_RATE,
952 .min_pll_rate = VCO_MIN_RATE,
H A Ddsi_phy_14nm.c547 dsi_pll_14nm_vco_set_rate(hw, pll_14nm->phy->cfg->min_pll_rate, VCO_REF_CLK_RATE); in dsi_pll_14nm_vco_prepare()
586 if (rate < pll_14nm->phy->cfg->min_pll_rate) in dsi_pll_14nm_clk_round_rate()
587 return pll_14nm->phy->cfg->min_pll_rate; in dsi_pll_14nm_clk_round_rate()
1051 .min_pll_rate = VCO_MIN_RATE,
1068 .min_pll_rate = VCO_MIN_RATE,
1085 .min_pll_rate = VCO_MIN_RATE,
1100 .min_pll_rate = VCO_MIN_RATE,
1117 .min_pll_rate = VCO_MIN_RATE,
H A Ddsi_phy_28nm_8960.c239 if (rate < pll_28nm->phy->cfg->min_pll_rate) in dsi_pll_28nm_clk_round_rate()
240 return pll_28nm->phy->cfg->min_pll_rate; in dsi_pll_28nm_clk_round_rate()
644 .min_pll_rate = VCO_MIN_RATE,
H A Ddsi_phy.h32 unsigned long min_pll_rate; member
H A Ddsi_phy_10nm.c452 if (rate < pll_10nm->phy->cfg->min_pll_rate) in dsi_pll_10nm_clk_round_rate()
453 return pll_10nm->phy->cfg->min_pll_rate; in dsi_pll_10nm_clk_round_rate()
1008 .min_pll_rate = 1000000000UL,
1026 .min_pll_rate = 1000000000UL,