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Searched refs:min_dst_y_next_start (Results 1 – 25 of 30) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml_display_rq_dlg_calc.c267 dml_uint_t min_dst_y_next_start; in dml_rq_dlg_get_dlg_reg() local
323 min_dst_y_next_start = (dml_uint_t)(dml_get_min_dst_y_next_start(mode_lib, pipe_idx)); in dml_rq_dlg_get_dlg_reg()
326 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); in dml_rq_dlg_get_dlg_reg()
411 …disp_dlg_regs->min_dst_y_next_start = (dml_uint_t)((dml_float_t) min_dst_y_next_start * dml_pow(2,… in dml_rq_dlg_get_dlg_reg()
412 ASSERT(disp_dlg_regs->min_dst_y_next_start < (dml_uint_t)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_reg()
H A Ddisplay_mode_core.h186 dml_get_per_surface_var_decl(min_dst_y_next_start, dml_uint_t);
H A Ddisplay_mode_util.c255 dml_print("DML: min_dst_y_next_start = 0x%x\n", dlg_regs->min_dst_y_next_start); in dml_print_dlg_regs_st()
H A Ddml2_translation_helper.c1477 out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_core_structs.h1933 dml_uint_t min_dst_y_next_start; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_rq_dlg_calc_32.c229 unsigned int min_dst_y_next_start; in dml32_rq_dlg_get_dlg_reg() local
280 min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml32_rq_dlg_get_dlg_reg()
283 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); in dml32_rq_dlg_get_dlg_reg()
441 dlg_regs->min_dst_y_next_start = min_dst_y_next_start * dml_pow(2, 2); in dml32_rq_dlg_get_dlg_reg()
442 ASSERT(dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml32_rq_dlg_get_dlg_reg()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.c361 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
376 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp21_validate_dml_output()
378 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
H A Ddcn20_hubp.c94 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp2_program_deadline()
1160 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp2_read_state_common()
1470 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
1485 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp2_validate_dml_output()
1487 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_dchub_registers.h14 uint32_t min_dst_y_next_start; member
H A Ddml_top_types.h606 double min_dst_y_next_start[DML2_MAX_PLANES]; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_rq_dlg_helpers.c192 dlg_regs->min_dst_y_next_start); in print__dlg_regs_st()
H A Ddisplay_mode_structs.h623 unsigned int min_dst_y_next_start; member
H A Ddml1_display_rq_dlg_calc.c1174 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml1_rq_dlg_get_dlg_params()
1176 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml1_rq_dlg_get_dlg_params()
1188 disp_dlg_regs->min_dst_y_next_start); in dml1_rq_dlg_get_dlg_params()
H A Ddisplay_mode_vba.h143 dml_get_pipe_attr_decl(min_dst_y_next_start);
H A Ddisplay_mode_vba.c183 dml_get_pipe_attr_func(min_dst_y_next_start, mode_lib->vba.MIN_DST_Y_NEXT_START);
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c982 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
983 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1004 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.c936 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params()
937 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20_rq_dlg_get_dlg_params()
953 disp_dlg_regs->min_dst_y_next_start); in dml20_rq_dlg_get_dlg_params()
H A Ddisplay_rq_dlg_calc_20v2.c936 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml20v2_rq_dlg_get_dlg_params()
938 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20v2_rq_dlg_get_dlg_params()
954 disp_dlg_regs->min_dst_y_next_start); in dml20v2_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c1050 disp_dlg_regs->min_dst_y_next_start = (unsigned int)(((double)dlg_vblank_start in dml_rq_dlg_get_dlg_params()
1052 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1068 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.c983 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
985 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
988 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c227 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp401_program_deadline()
828 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp401_read_state()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.c1070 disp_dlg_regs->min_dst_y_next_start = vba__min_dst_y_next_start * dml_pow(2, 2); in dml_rq_dlg_get_dlg_params()
1072 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1075 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
H A Ddcn10_hubp.c619 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp1_program_deadline()
929 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp1_read_state_common()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c261 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_get_dlg_states()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h1439 unsigned int min_dst_y_next_start; member

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