Searched refs:min_clk_table (Results 1 – 7 of 7) sorted by relevance
15 …out->stage1.min_clk_index_for_latency = dml->min_clk_table.dram_bw_table.num_entries - 1; //dml->m… in setup_unoptimized_display_config_with_meta()251 l->mode_support_params.min_clk_table = ¶ms->dml->min_clk_table; in dml2_top_optimization_perform_optimization_phase()303 l->mode_support_params.min_clk_table = ¶ms->dml->min_clk_table; in dml2_top_optimization_perform_optimization_phase_1()789 l->mode_support_params.min_clk_table = &dml->min_clk_table; in dml2_top_soc15_check_mode_supported()810 l->dppm_map_mode_params.min_clk_table = &dml->min_clk_table; in dml2_top_soc15_check_mode_supported()844 l->mode_support_params.min_clk_table = &dml->min_clk_table; in dml2_top_soc15_build_mode_programming()855 l->mode_support_params.min_clk_table = &dml->min_clk_table; in dml2_top_soc15_build_mode_programming()982 l->dppm_map_mode_params.min_clk_table = &dml->min_clk_table; in dml2_top_soc15_build_mode_programming()1138 mcg_build_min_clk_params.min_clk_table = &dml->min_clk_table; in dml2_top_soc15_initialize_instance()1145 core_init_params.minimum_clock_table = &dml->min_clk_table; in dml2_top_soc15_initialize_instance()[all …]
63 struct dml2_mcg_min_clock_table *min_clk_table; member79 struct dml2_mcg_min_clock_table *min_clk_table; member365 struct dml2_mcg_min_clock_table *min_clk_table; member958 struct dml2_mcg_min_clock_table min_clk_table; member
34 *dcfclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_dcfclk_khz; in get_minimum_clocks_for_latency()35 *fclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_fclk_khz; in get_minimum_clocks_for_latency()36 …*uclk = dram_bw_kbps_to_uclk_khz(in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_… in get_minimum_clocks_for_latency()617 dispclk_khz = math_min2(dispclk_khz, in_out->min_clk_table->max_clocks_khz.dispclk); in map_mode_to_soc_dpm()
422 l->mode_support_ex_params.min_clk_table = in_out->min_clk_table; in core_dcn4_mode_support()558 l->mode_programming_ex_params.min_clk_table = in_out->instance->minimum_clock_table; in core_dcn4_mode_programming()
2142 const struct dml2_mcg_min_clock_table *min_clk_table; member2153 const struct dml2_mcg_min_clock_table *min_clk_table; member
7342 const struct dml2_mcg_min_clock_table *min_clk_table = in_out_params->min_clk_table; in dml_core_mode_support() local7375 mode_lib->ms.MaxDCFCLK = (double)min_clk_table->max_clocks_khz.dcfclk / 1000; in dml_core_mode_support()7376 mode_lib->ms.MaxFabricClock = (double)min_clk_table->max_clocks_khz.fclk / 1000; in dml_core_mode_support()7377 mode_lib->ms.max_dispclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dispclk / 1000; in dml_core_mode_support()7378 mode_lib->ms.max_dscclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dscclk / 1000; in dml_core_mode_support()7379 mode_lib->ms.max_dppclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dppclk / 1000; in dml_core_mode_support()7382 …mode_lib->ms.max_dram_bw_mbps = ((double)min_clk_table->dram_bw_table.entries[min_clk_table->dram_… in dml_core_mode_support()8141 if (mode_lib->ms.RequiredDTBCLK[k] > ((double)min_clk_table->max_clocks_khz.dtbclk / 1000)) { in dml_core_mode_support()10398 const struct dml2_mcg_min_clock_table *min_clk_table = in_out_params->min_clk_table; in dml_core_mode_programming() local10420 const double max_fclk_mhz = min_clk_table->max_clocks_khz.fclk / 1000.0; in dml_core_mode_programming()[all …]
12 return build_min_clock_table(in_out->soc_bb, in_out->min_clk_table); in mcg_dcn4_build_min_clock_table()