Home
last modified time | relevance | path

Searched refs:min_cdclk (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c2786 min_cdclk = max(min_cdclk, crtc_state->min_cdclk[plane->id]); in intel_planes_min_cdclk()
2793 int min_cdclk; in intel_crtc_compute_min_cdclk() local
2799 min_cdclk = max(min_cdclk, hsw_ips_min_cdclk(crtc_state)); in intel_crtc_compute_min_cdclk()
2800 min_cdclk = max(min_cdclk, intel_audio_min_cdclk(crtc_state)); in intel_crtc_compute_min_cdclk()
2801 min_cdclk = max(min_cdclk, vlv_dsi_min_cdclk(crtc_state)); in intel_crtc_compute_min_cdclk()
2803 min_cdclk = max(min_cdclk, intel_vdsc_min_cdclk(crtc_state)); in intel_crtc_compute_min_cdclk()
2827 if (cdclk_state->min_cdclk[crtc->pipe] == min_cdclk) in intel_compute_min_cdclk()
2830 cdclk_state->min_cdclk[crtc->pipe] = min_cdclk; in intel_compute_min_cdclk()
2855 min_cdclk = max(min_cdclk, cdclk_state->min_cdclk[pipe]); in intel_compute_min_cdclk()
2867 min_cdclk = max(min_cdclk, 2 * 96000); in intel_compute_min_cdclk()
[all …]
H A Dintel_audio.c996 int min_cdclk = 0; in intel_audio_min_cdclk() local
1011 min_cdclk = max(min_cdclk, 316800); in intel_audio_min_cdclk()
1014 min_cdclk = max(min_cdclk, 432000); in intel_audio_min_cdclk()
1023 min_cdclk = max(min_cdclk, 2 * 96000); in intel_audio_min_cdclk()
1034 min_cdclk = max(min_cdclk, crtc_state->port_clock); in intel_audio_min_cdclk()
1036 return min_cdclk; in intel_audio_min_cdclk()
H A Dintel_atomic_plane.c287 if (!plane_state->uapi.visible || !plane->min_cdclk) in intel_plane_calc_min_cdclk()
293 new_crtc_state->min_cdclk[plane->id] = in intel_plane_calc_min_cdclk()
294 plane->min_cdclk(new_crtc_state, plane_state); in intel_plane_calc_min_cdclk()
304 if (new_crtc_state->min_cdclk[plane->id] <= in intel_plane_calc_min_cdclk()
305 old_crtc_state->min_cdclk[plane->id]) in intel_plane_calc_min_cdclk()
320 if (new_crtc_state->min_cdclk[plane->id] <= in intel_plane_calc_min_cdclk()
321 cdclk_state->min_cdclk[crtc->pipe]) in intel_plane_calc_min_cdclk()
327 new_crtc_state->min_cdclk[plane->id], in intel_plane_calc_min_cdclk()
329 cdclk_state->min_cdclk[crtc->pipe]); in intel_plane_calc_min_cdclk()
418 crtc_state->min_cdclk[plane->id] = 0; in intel_plane_set_invisible()
H A Dintel_bw.c1153 if (old_bw_state->min_cdclk[pipe] != new_bw_state->min_cdclk[pipe]) in intel_bw_state_changed()
1248 int min_cdclk; in intel_bw_min_cdclk() local
1250 min_cdclk = intel_bw_dbuf_min_cdclk(i915, bw_state); in intel_bw_min_cdclk()
1253 min_cdclk = max(min_cdclk, bw_state->min_cdclk[pipe]); in intel_bw_min_cdclk()
1255 return min_cdclk; in intel_bw_min_cdclk()
1282 new_bw_state->min_cdclk[crtc->pipe] = in intel_bw_calc_min_cdclk()
H A Dintel_bw.h58 int min_cdclk[I915_MAX_PIPES]; member
H A Dintel_cdclk.h45 int min_cdclk[I915_MAX_PIPES]; member
H A Dintel_vdsc.c1020 int min_cdclk; in intel_vdsc_min_cdclk() local
1032 min_cdclk = DIV_ROUND_UP(crtc_state->pixel_rate, num_vdsc_instances); in intel_vdsc_min_cdclk()
1054 min_cdclk = max(min_cdclk, min_cdclk_bj); in intel_vdsc_min_cdclk()
1057 return min_cdclk; in intel_vdsc_min_cdclk()
H A Dintel_modeset_setup.c857 if (plane_state->uapi.visible && plane->min_cdclk) { in intel_modeset_readout_hw_state()
859 crtc_state->min_cdclk[plane->id] = in intel_modeset_readout_hw_state()
862 crtc_state->min_cdclk[plane->id] = in intel_modeset_readout_hw_state()
868 crtc_state->min_cdclk[plane->id]); in intel_modeset_readout_hw_state()
H A Di9xx_plane.c968 plane->min_cdclk = vlv_plane_min_cdclk; in intel_primary_plane_create()
970 plane->min_cdclk = hsw_plane_min_cdclk; in intel_primary_plane_create()
972 plane->min_cdclk = ivb_plane_min_cdclk; in intel_primary_plane_create()
974 plane->min_cdclk = i9xx_plane_min_cdclk; in intel_primary_plane_create()
H A Dintel_sprite.c1628 plane->min_cdclk = vlv_plane_min_cdclk; in intel_sprite_plane_create()
1653 plane->min_cdclk = hsw_plane_min_cdclk; in intel_sprite_plane_create()
1656 plane->min_cdclk = ivb_sprite_min_cdclk; in intel_sprite_plane_create()
1677 plane->min_cdclk = g4x_sprite_min_cdclk; in intel_sprite_plane_create()
H A Dintel_display_types.h1173 int min_cdclk[I915_MAX_PLANES]; member
1506 int (*min_cdclk)(const struct intel_crtc_state *crtc_state, member
H A Dskl_universal_plane.c2819 plane->min_cdclk = icl_plane_min_cdclk; in skl_universal_plane_create()
2827 plane->min_cdclk = icl_plane_min_cdclk; in skl_universal_plane_create()
2831 plane->min_cdclk = glk_plane_min_cdclk; in skl_universal_plane_create()
2835 plane->min_cdclk = skl_plane_min_cdclk; in skl_universal_plane_create()