Searched refs:mg_pll_div0 (Results 1 – 2 of 2) sorted by relevance
3108 hw_state->mg_pll_div0 = DKL_PLL_DIV0_INTEG_COEFF(int_coeff) | in icl_calc_mg_pll_state()3115 hw_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(val); in icl_calc_mg_pll_state()3134 hw_state->mg_pll_div0 = in icl_calc_mg_pll_state()3214 m1 = hw_state->mg_pll_div0 & DKL_PLL_DIV0_FBPREDIV_MASK; in icl_ddi_mg_pll_get_freq()3227 m2_int = hw_state->mg_pll_div0 & MG_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()3229 if (hw_state->mg_pll_div0 & MG_PLL_DIV0_FRACNEN_H) { in icl_ddi_mg_pll_get_freq()3230 m2_frac = hw_state->mg_pll_div0 & in icl_ddi_mg_pll_get_freq()3655 hw_state->mg_pll_div0 &= val; in dkl_pll_get_hw_state()3878 hw_state->mg_pll_div0); in dkl_pll_write()4103 hw_state->mg_pll_div0, in icl_dump_hw_state()[all …]
220 u32 mg_pll_div0; member