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Searched refs:mci_readl (Results 1 – 8 of 8) sorted by relevance

/linux-6.15/drivers/mmc/host/
H A Ddw_mmc-exynos.c132 priv->saved_dqs_en = mci_readl(host, HS400_DQS_EN); in dw_mci_exynos_priv_init()
166 clksel = mci_readl(host, CLKSEL64); in dw_mci_exynos_set_clksel_timing()
168 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_set_clksel_timing()
249 clksel = mci_readl(host, CLKSEL64); in dw_mci_exynos_resume_noirq()
251 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_resume_noirq()
455 clksel = mci_readl(host, CLKSEL64); in dw_mci_exynos_set_clksmpl()
457 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_set_clksmpl()
480 clksel = mci_readl(host, CLKSEL64); in dw_mci_exynos_move_next_clksmpl()
482 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_move_next_clksmpl()
588 clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2; in dw_mci_exynos_set_data_timeout()
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H A Ddw_mmc.c195 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
450 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
461 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
467 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
744 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
752 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
1117 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1123 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1178 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1577 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
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H A Ddw_mmc-hi3798cv200.c31 val = mci_readl(host, UHS_REG); in dw_mci_hi3798cv200_set_ios()
39 val = mci_readl(host, ENABLE_SHIFT); in dw_mci_hi3798cv200_set_ios()
46 val = mci_readl(host, DDR_REG); in dw_mci_hi3798cv200_set_ios()
H A Ddw_mmc-hi3798mv200.c42 val = mci_readl(host, ENABLE_SHIFT); in dw_mci_hi3798mv200_set_ios()
50 val = mci_readl(host, DDR_REG); in dw_mci_hi3798mv200_set_ios()
119 regval = mci_readl(host, TUNING_CTRL); in dw_mci_hi3798mv200_execute_tuning_mix_mode()
H A Ddw_mmc-bluefield.c32 reg = mci_readl(host, UHS_REG_EXT); in dw_mci_bluefield_set_ios()
H A Ddw_mmc-starfive.c45 u32 reg_value = mci_readl(host, UHS_REG_EXT); in dw_mci_starfive_set_sample_phase()
H A Ddw_mmc-rockchip.c56 raw_value = mci_readl(host, TIMING_CON1); in rockchip_mmc_get_internal_phase()
58 raw_value = mci_readl(host, TIMING_CON0); in rockchip_mmc_get_internal_phase()
H A Ddw_mmc.h503 #define mci_readl(dev, reg) \ macro