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Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c1253 max_limits->sclk, in btc_adjust_clock_combinations()
1260 max_limits->mclk, in btc_adjust_clock_combinations()
2105 ps->low.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()
2107 ps->low.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()
2109 ps->low.vddc = max_limits->vddc; in btc_apply_state_adjust_rules()
2134 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in btc_apply_state_adjust_rules()
2170 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in btc_apply_state_adjust_rules()
2172 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in btc_apply_state_adjust_rules()
2206 btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, in btc_apply_state_adjust_rules()
2208 btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, in btc_apply_state_adjust_rules()
[all …]
H A Dbtc_dpm.h48 const struct radeon_clock_and_voltage_limits *max_limits,
H A Dni_dpm.c789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()
811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()
813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()
815 ps->performance_levels[i].vddci = max_limits->vddci; in ni_apply_state_adjust_rules()
829 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
864 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
869 btc_adjust_clock_combinations(rdev, max_limits, in ni_apply_state_adjust_rules()
[all …]
H A Dci_dpm.c770 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local
795 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()
797 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()
801 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()
802 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()
803 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()
804 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()
3882 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local
3931 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_vce_dpm() local
3964 const struct radeon_clock_and_voltage_limits *max_limits;
[all …]
H A Dsi_dpm.c2906 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
2973 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
2974 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
2975 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
2976 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
2977 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()
2978 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
2979 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
2980 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3085 btc_adjust_clock_combinations(rdev, max_limits, in si_apply_state_adjust_rules()
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H A Dkv_dpm.c1947 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
1958 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
1962 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2081 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2083 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/linux-6.15/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c3296 max_limits->sclk, in btc_adjust_clock_combinations()
3303 max_limits->mclk, in btc_adjust_clock_combinations()
3426 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3490 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3491 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3492 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3493 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
3495 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
3497 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3602 btc_adjust_clock_combinations(adev, max_limits, in si_apply_state_adjust_rules()
[all …]
H A Dkv_dpm.c2209 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
2220 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
2224 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2343 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2345 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c3309 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()
3317 max_limits->mclk) in vega10_apply_state_adjust_rules()
3319 max_limits->mclk; in vega10_apply_state_adjust_rules()
3321 max_limits->sclk) in vega10_apply_state_adjust_rules()
3323 max_limits->sclk; in vega10_apply_state_adjust_rules()
3341 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()
3357 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3383 max_limits->sclk : minimum_clocks.engineClock; in vega10_apply_state_adjust_rules()
3387 max_limits->mclk : minimum_clocks.memoryClock; in vega10_apply_state_adjust_rules()
4398 info->engine_max_clock = max_limits->sclk; in vega10_get_dal_power_level()
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H A Dsmu7_hwmgr.c3324 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local
3342 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()
3350 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()
3352 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()
3361 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()
3362 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()
3377 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3412 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()
3413 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()
3416 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()
[all …]
H A Dvega12_hwmgr.c1831 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()
1834 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()
1835 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
H A Dvega20_hwmgr.c2805 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()
2808 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()
2809 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()