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Searched refs:max_lanes (Results 1 – 25 of 28) sorted by relevance

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/linux-6.15/tools/testing/selftests/drivers/net/mlxsw/
H A Dethtool_lanes.sh56 local max_lanes=$1; shift
60 local unsupported_lanes=$((max_lanes *= 2))
74 local max_lanes
111 local max_lanes
116 max_lanes=${max_values[1]}
118 lanes=$max_lanes
136 check_unsupported_lanes $swp1 $max_speed $max_lanes 1
149 local max_lanes
154 max_lanes=${max_values[1]}
156 lanes=$max_lanes
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/linux-6.15/tools/testing/selftests/drivers/net/hw/
H A Ddevlink_port_split.py158 max_lanes = get_max_lanes(port)
162 if max_lanes != lanes:
164 % (port, lanes, max_lanes))
280 max_lanes = get_max_lanes(port.name)
283 if max_lanes == 0:
287 elif max_lanes == 1:
290 split_unsplittable_port(port, max_lanes)
294 lane = max_lanes
298 split_splittable_port(port, lane, max_lanes, dev)
/linux-6.15/drivers/pci/controller/cadence/
H A Dpci-j721e.c59 u32 max_lanes; member
338 .max_lanes = 2,
344 .max_lanes = 2,
352 .max_lanes = 2,
360 .max_lanes = 2,
367 .max_lanes = 1,
373 .max_lanes = 1,
381 .max_lanes = 4,
387 .max_lanes = 4,
394 .max_lanes = 1,
[all …]
/linux-6.15/drivers/media/platform/cadence/
H A Dcdns-csi2rx.c95 u8 max_lanes; member
235 for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) { in csi2rx_start()
237 csi2rx->max_lanes); in csi2rx_start()
564 csi2rx->max_lanes = dev_cfg & 7; in csi2rx_get_resources()
565 if (csi2rx->max_lanes > CSI2RX_LANES_MAX) { in csi2rx_get_resources()
567 csi2rx->max_lanes); in csi2rx_get_resources()
640 if (csi2rx->num_lanes > csi2rx->max_lanes) { in csi2rx_parse_dt()
718 csi2rx->num_lanes, csi2rx->max_lanes, csi2rx->max_streams, in csi2rx_probe()
H A Dcdns-csi2tx.c117 unsigned int max_lanes; member
465 csi2tx->max_lanes = dev_cfg & CSI2TX_DEVICE_CONFIG_LANES_MASK; in csi2tx_get_resources()
466 if (csi2tx->max_lanes > CSI2TX_LANES_MAX) { in csi2tx_get_resources()
468 csi2tx->max_lanes); in csi2tx_get_resources()
520 if (csi2tx->num_lanes > csi2tx->max_lanes) { in csi2tx_check_lanes()
627 csi2tx->num_lanes, csi2tx->max_lanes, csi2tx->max_streams, in csi2tx_probe()
/linux-6.15/drivers/media/platform/raspberrypi/rp1-cfe/
H A Ddphy.h19 u32 max_lanes; member
H A Dcfe.c1218 cfe->csi2.dphy.active_lanes = cfe->csi2.dphy.max_lanes; in cfe_start_streaming()
1219 if (cfe->csi2.dphy.active_lanes > cfe->csi2.dphy.max_lanes) { in cfe_start_streaming()
1221 cfe->csi2.dphy.active_lanes, cfe->csi2.dphy.max_lanes); in cfe_start_streaming()
2246 cfe->csi2.dphy.max_lanes = ep.bus.mipi_csi2.num_data_lanes; in cfe_register_async_nf()
/linux-6.15/drivers/gpu/drm/rockchip/
H A Dcdn-dp-reg.c539 dp->max_lanes = status[1]; in cdn_dp_get_training_status()
564 dp->max_lanes); in cdn_dp_train_link()
662 do_div(symbol, dp->max_lanes * link_rate * 8); in cdn_dp_config_video()
668 mode->clock, dp->max_lanes, link_rate); in cdn_dp_config_video()
682 val /= (dp->max_lanes * link_rate); in cdn_dp_config_video()
835 if (dp->max_lanes == 1) in cdn_dp_audio_config_i2s()
H A Dcdn-dp-core.h98 u8 max_lanes; member
H A Dcdn-dp-core.c489 dp->max_lanes = 0; in cdn_dp_disable()
582 if (!port || !dp->max_rate || !dp->max_lanes) in cdn_dp_check_link_status()
985 unsigned int lanes = dp->max_lanes; in cdn_dp_pd_event_work()
998 (rate != dp->max_rate || lanes != dp->max_lanes)) { in cdn_dp_pd_event_work()
/linux-6.15/drivers/gpu/drm/tegra/
H A Ddp.c43 link->max_lanes = 0; in drm_dp_link_reset()
184 link->max_lanes = drm_dp_max_lane_count(dpcd); in drm_dp_link_probe()
233 link->lanes = link->max_lanes; in drm_dp_link_probe()
402 for (i = 0; i < ARRAY_SIZE(lanes) && lanes[i] <= link->max_lanes; i++) { in drm_dp_link_choose()
H A Ddp.h125 unsigned int max_lanes; member
/linux-6.15/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c255 u8 max_lanes; member
648 u8 max_lanes = dp->link_config.max_lanes; in zynqmp_dp_mode_configure() local
670 for (lane_cnt = 1; lane_cnt <= max_lanes; lane_cnt <<= 1) { in zynqmp_dp_mode_configure()
1538 dp->link_config.max_lanes, in zynqmp_dp_bridge_mode_valid()
1585 dp->link_config.max_lanes, dp->config.bpp); in zynqmp_dp_bridge_atomic_enable()
1709 link_config->max_lanes = min_t(u8, in __zynqmp_dp_bridge_detect()
/linux-6.15/include/drm/
H A Ddrm_connector.h289 u8 max_lanes; member
331 u8 max_lanes; member
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dp.c376 int max_lanes = dig_port->max_lanes; in intel_dp_max_source_lane_count() local
379 max_lanes = min(max_lanes, vbt_max_lanes); in intel_dp_max_source_lane_count()
381 return max_lanes; in intel_dp_max_source_lane_count()
1458 max_lanes = intel_dp_max_lane_count(intel_dp); in intel_dp_mode_valid()
1491 max_lanes, in intel_dp_mode_valid()
3695 int max_lanes, rate_per_lane; in intel_dp_hdmi_sink_max_frl() local
3698 max_lanes = info->hdmi.max_lanes; in intel_dp_hdmi_sink_max_frl()
3700 max_frl_rate = max_lanes * rate_per_lane; in intel_dp_hdmi_sink_max_frl()
3703 max_dsc_lanes = info->hdmi.dsc_cap.max_lanes; in intel_dp_hdmi_sink_max_frl()
6524 if (drm_WARN(dev, dig_port->max_lanes < 1, in intel_dp_init_connector()
[all …]
H A Dintel_tc.c624 int max_lanes; in tc_phy_verify_legacy_or_dp_alt_mode() local
626 max_lanes = intel_tc_port_max_lane_count(dig_port); in tc_phy_verify_legacy_or_dp_alt_mode()
628 drm_WARN_ON(&i915->drm, max_lanes != 4); in tc_phy_verify_legacy_or_dp_alt_mode()
644 if (max_lanes < required_lanes) { in tc_phy_verify_legacy_or_dp_alt_mode()
648 max_lanes, required_lanes); in tc_phy_verify_legacy_or_dp_alt_mode()
H A Dintel_dp_mst.c1471 int max_rate, mode_rate, max_lanes, max_link_clock; in mst_connector_mode_valid_ctx() local
1499 max_lanes = intel_dp_max_lane_count(intel_dp); in mst_connector_mode_valid_ctx()
1502 max_link_clock, max_lanes); in mst_connector_mode_valid_ctx()
1542 max_lanes, in mst_connector_mode_valid_ctx()
H A Dintel_ddi.c1126 if (encoder->port == PORT_A && dig_port->max_lanes == 4) in skl_ddi_set_iboost()
4873 int max_lanes = 4; in intel_ddi_max_lanes() local
4876 return max_lanes; in intel_ddi_max_lanes()
4880 max_lanes = port == PORT_A ? 4 : 0; in intel_ddi_max_lanes()
4883 max_lanes = 2; in intel_ddi_max_lanes()
4895 max_lanes = 4; in intel_ddi_max_lanes()
4898 return max_lanes; in intel_ddi_max_lanes()
5333 dig_port->max_lanes = intel_ddi_max_lanes(dig_port); in intel_ddi_init()
H A Dg4x_hdmi.c782 dig_port->max_lanes = 4; in g4x_hdmi_init()
/linux-6.15/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c371 cdv_intel_dp_max_data_rate(int max_link_clock, int max_lanes) in cdv_intel_dp_max_data_rate() argument
373 return (max_link_clock * max_lanes * 19) / 20; in cdv_intel_dp_max_data_rate()
513 int max_lanes = cdv_intel_dp_max_lane_count(encoder); in cdv_intel_dp_mode_valid() local
527 > cdv_intel_dp_max_data_rate(max_link_clock, max_lanes))) in cdv_intel_dp_mode_valid()
532 > cdv_intel_dp_max_data_rate(max_link_clock, max_lanes)) in cdv_intel_dp_mode_valid()
/linux-6.15/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c553 u32 max_lanes, u32 max_rate) in analogix_dp_full_link_train() argument
577 if (dp->link_train.lane_count > max_lanes) in analogix_dp_full_link_train()
578 dp->link_train.lane_count = max_lanes; in analogix_dp_full_link_train()
/linux-6.15/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c2947 u8 max_lanes = dp_lttpr_common_cap(caps, DP_MAX_LANE_COUNT_PHY_REPEATER); in drm_dp_lttpr_max_lane_count() local
2949 return max_lanes & DP_MAX_LANE_COUNT_MASK; in drm_dp_lttpr_max_lane_count()
3660 for (i = 0; i < hdmi->max_lanes; i++) { in drm_dp_pcon_hdmi_frl_link_error_count()
4545 int drm_dp_max_dprx_data_rate(int max_link_rate, int max_lanes) in drm_dp_max_dprx_data_rate() argument
4550 return DIV_ROUND_DOWN_ULL(mul_u32_u32(max_link_rate * 10 * max_lanes, in drm_dp_max_dprx_data_rate()
/linux-6.15/drivers/gpu/drm/
H A Ddrm_edid.c6086 void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane) in drm_get_max_frl_rate() argument
6090 *max_lanes = 3; in drm_get_max_frl_rate()
6094 *max_lanes = 3; in drm_get_max_frl_rate()
6098 *max_lanes = 4; in drm_get_max_frl_rate()
6102 *max_lanes = 4; in drm_get_max_frl_rate()
6106 *max_lanes = 4; in drm_get_max_frl_rate()
6110 *max_lanes = 4; in drm_get_max_frl_rate()
6115 *max_lanes = 0; in drm_get_max_frl_rate()
6156 drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, in drm_parse_dsc_info()
6250 drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, in drm_parse_hdmi_forum_scds()
/linux-6.15/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c105 u8 max_lanes; member
1428 mtk_dp->train_info.lane_count = mtk_dp->max_lanes; in mtk_dp_initialize_priv_data()
1823 lane_count = min_t(u8, mtk_dp->max_lanes, in mtk_dp_training()
2095 mtk_dp->max_lanes = len; in mtk_dp_dt_parse()
/linux-6.15/include/drm/display/
H A Ddrm_dp_helper.h881 int drm_dp_max_dprx_data_rate(int max_link_rate, int max_lanes);

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