| /linux-6.15/drivers/clk/mmp/ |
| H A D | clk-frac.c | 55 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_recalc_rate() local
63 d.numerator = (val >> masks->num_shift) & masks->num_mask; in clk_factor_recalc_rate()
66 d.denominator = (val >> masks->den_shift) & masks->den_mask; in clk_factor_recalc_rate()
81 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_set_rate() local
103 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_set_rate()
106 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_set_rate()
120 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_init() local
132 d.numerator = (val >> masks->num_shift) & masks->num_mask; in clk_factor_init()
143 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_init()
146 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_init()
[all …]
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| /linux-6.15/drivers/clk/spear/ |
| H A D | clk-aux-synth.c | 77 eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; in clk_aux_recalc_rate()
83 aux->masks->xscale_sel_mask; in clk_aux_recalc_rate()
87 aux->masks->yscale_sel_mask; in clk_aux_recalc_rate()
111 ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); in clk_aux_set_rate()
113 aux->masks->eq_sel_shift; in clk_aux_set_rate()
114 val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); in clk_aux_set_rate()
116 aux->masks->xscale_sel_shift; in clk_aux_set_rate()
117 val &= ~(aux->masks->yscale_sel_mask << aux->masks->yscale_sel_shift); in clk_aux_set_rate()
119 aux->masks->yscale_sel_shift; in clk_aux_set_rate()
153 if (!masks) in clk_register_aux()
[all …]
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| /linux-6.15/lib/ |
| H A D | group_cpus.c | 51 if (!masks) in alloc_node_to_cpumask()
59 return masks; in alloc_node_to_cpumask()
64 kfree(masks); in alloc_node_to_cpumask()
74 kfree(masks); in free_node_to_cpumask()
273 cpumask_or(&masks[curgrp], &masks[curgrp], nmsk); in __group_cpus_evenly()
365 masks = kcalloc(numgrps, sizeof(*masks), GFP_KERNEL); in group_cpus_evenly()
366 if (!masks) in group_cpus_evenly()
421 kfree(masks); in group_cpus_evenly()
424 return masks; in group_cpus_evenly()
431 if (!masks) in group_cpus_evenly()
[all …]
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| /linux-6.15/kernel/irq/ |
| H A D | affinity.c | 29 struct irq_affinity_desc *masks = NULL; in irq_create_affinity_masks() local
59 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in irq_create_affinity_masks()
60 if (!masks) in irq_create_affinity_masks()
65 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
77 kfree(masks); in irq_create_affinity_masks()
82 cpumask_copy(&masks[curvec + j].mask, &result[j]); in irq_create_affinity_masks()
95 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
99 masks[i].is_managed = 1; in irq_create_affinity_masks()
101 return masks; in irq_create_affinity_masks()
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| /linux-6.15/drivers/net/dsa/microchip/ |
| H A D | ksz8.c | 275 const u32 *masks; in ksz8_r_mib_cnt() local
282 masks = dev->info->masks; in ksz8_r_mib_cnt()
318 masks = dev->info->masks; in ksz8795_r_mib_pkt()
501 masks = dev->info->masks; in ksz8_valid_dyn_entry()
534 masks = dev->info->masks; in ksz8_r_dyn_mac_table()
596 masks = dev->info->masks; in ksz8_r_sta_mac_table()
647 masks = dev->info->masks; in ksz8_w_sta_mac_table()
678 masks = dev->info->masks; in ksz8_from_vlan()
693 masks = dev->info->masks; in ksz8_to_vlan()
1630 masks = dev->info->masks; in ksz8_port_setup()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| H A D | dcn10_dpp_cm.c | 119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
197 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in read_gamut_remap()
199 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in read_gamut_remap()
282 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
284 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
338 reg->masks.field_region_end = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
346 reg->masks.exp_region_start = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_START_B; in dpp1_cm_get_reg_field()
365 reg->masks.field_region_end = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_degamma_reg_field()
539 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_ICSC_C11; in dpp1_program_input_csc()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_i2c_hw.c | 308 if (dce_i2c_hw->masks->DC_I2C_DDC1_CLK_EN) in setup_engine()
620 const struct dce_i2c_mask *masks) in dce_i2c_hw_construct() argument
627 dce_i2c_hw->masks = masks; in dce_i2c_hw_construct()
643 const struct dce_i2c_mask *masks) in dce100_i2c_hw_construct() argument
650 masks); in dce100_i2c_hw_construct()
660 const struct dce_i2c_mask *masks) in dce112_i2c_hw_construct() argument
667 masks); in dce112_i2c_hw_construct()
677 const struct dce_i2c_mask *masks) in dcn1_i2c_hw_construct() argument
684 masks); in dcn1_i2c_hw_construct()
694 const struct dce_i2c_mask *masks) in dcn2_i2c_hw_construct() argument
[all …]
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| /linux-6.15/block/ |
| H A D | blk-mq-cpumap.c | 21 const struct cpumask *masks; in blk_mq_map_queues() local
24 masks = group_cpus_evenly(qmap->nr_queues); in blk_mq_map_queues()
25 if (!masks) { in blk_mq_map_queues()
32 for_each_cpu(cpu, &masks[queue]) in blk_mq_map_queues()
35 kfree(masks); in blk_mq_map_queues()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| H A D | dcn30_dpp_cm.c | 176 reg->masks.field_offset = dpp->tf_mask->CM_GAMCOR_RAMA_OFFSET_B; in dpp3_gamcor_reg_field()
179 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_LUT_OFFSET; in dpp3_gamcor_reg_field()
183 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_LUT_OFFSET; in dpp3_gamcor_reg_field()
188 reg->masks.field_region_end = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_B; in dpp3_gamcor_reg_field()
190 reg->masks.field_region_end_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_SLOPE_B; in dpp3_gamcor_reg_field()
192 reg->masks.field_region_end_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_BASE_B; in dpp3_gamcor_reg_field()
196 reg->masks.exp_region_start = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_B; in dpp3_gamcor_reg_field()
342 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
344 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
422 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in read_gamut_remap()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb_cm.c | 53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
75 reg->masks.exp_region_start = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_B; in dwb3_get_reg_field_ogam()
319 gam_regs.masks.csc_c11 = dwbc30->dwbc_mask->DWB_GAMUT_REMAPA_C11; in dwb3_program_gamut_remap()
[all …]
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| /linux-6.15/drivers/clk/uniphier/ |
| H A D | clk-uniphier-mux.c | 17 const unsigned int *masks; member
27 return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index], in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
77 mux->masks = data->masks; in uniphier_clk_register_mux()
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| /linux-6.15/drivers/virtio/ |
| H A D | virtio_vdpa.c | 309 struct cpumask *masks = NULL; in create_affinity_masks() local
322 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in create_affinity_masks()
323 if (!masks) in create_affinity_masks()
328 cpumask_setall(&masks[curvec]); in create_affinity_masks()
336 kfree(masks); in create_affinity_masks()
354 cpumask_setall(&masks[curvec]); in create_affinity_masks()
356 return masks; in create_affinity_masks()
367 struct cpumask *masks; in virtio_vdpa_find_vqs() local
374 if (!masks) in virtio_vdpa_find_vqs()
401 kfree(masks); in virtio_vdpa_find_vqs()
[all …]
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| /linux-6.15/security/landlock/ |
| H A D | cred.h | 111 const struct access_masks masks, in landlock_get_applicable_subject() argument
115 .masks = masks, in landlock_get_applicable_subject()
130 .masks = domain->access_masks[layer_level], in landlock_get_applicable_subject()
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| /linux-6.15/drivers/net/ethernet/intel/ice/ |
| H A D | ice_flex_pipe.c | 1176 if (hw->blk[blk].masks.masks[i].in_use && in ice_prof_has_mask_idx()
1484 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks)); in ice_init_prof_masks()
1525 if (hw->blk[blk].masks.masks[i].in_use) { in ice_alloc_prof_mask()
1555 hw->blk[blk].masks.masks[i].mask = mask; in ice_alloc_prof_mask()
1556 hw->blk[blk].masks.masks[i].idx = idx; in ice_alloc_prof_mask()
1557 hw->blk[blk].masks.masks[i].ref = 0; in ice_alloc_prof_mask()
1561 hw->blk[blk].masks.masks[i].ref++; in ice_alloc_prof_mask()
1593 hw->blk[blk].masks.masks[mask_idx].ref--; in ice_free_prof_mask()
1654 hw->blk[blk].masks.masks[i].idx = 0; in ice_shutdown_prof_masks()
1655 hw->blk[blk].masks.masks[i].mask = 0; in ice_shutdown_prof_masks()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/mpc/dcn20/ |
| H A D | dcn20_mpc.c | 165 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_output_csc()
167 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_output_csc()
223 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
225 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
251 reg->masks.exp_region0_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
253 reg->masks.exp_region0_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
255 reg->masks.exp_region1_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
259 reg->masks.field_region_end = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
261 reg->masks.field_region_end_slope = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc2_ogam_get_reg_field()
263 reg->masks.field_region_end_base = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_BASE_B; in mpc2_ogam_get_reg_field()
[all …]
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| /linux-6.15/Documentation/devicetree/bindings/usb/ |
| H A D | brcm,usb-pinmap.yaml | 33 brcm,in-masks:
45 brcm,out-masks:
47 description: Array of enable, value, changed and clear masks, one
66 brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
69 brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
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| /linux-6.15/drivers/s390/char/ |
| H A D | sclp.h | 93 u8 masks[4 * 1021]; /* variable length */ member
104 static inline sccb_mask_t sccb_get_mask(u8 *masks, size_t len, int i) in sccb_get_mask() argument
108 memcpy(&res, masks + i * len, min(sizeof(res), len)); in sccb_get_mask()
112 static inline void sccb_set_mask(u8 *masks, size_t len, int i, sccb_mask_t val) in sccb_set_mask() argument
114 memset(masks + i * len, 0, len); in sccb_set_mask()
115 memcpy(masks + i * len, &val, min(sizeof(val), len)); in sccb_set_mask()
122 sccb_get_mask(__sccb->masks, __sccb->mask_length, i); \
133 sccb_set_mask(__sccb->masks, __sccb->mask_length, i, val); \
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| /linux-6.15/Documentation/devicetree/bindings/sound/ |
| H A D | tdm-slot.txt | 20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
24 the masks.
26 The explicit masks are given as array of integers, where the first
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| /linux-6.15/kernel/sched/ |
| H A D | topology.c | 1919 if (!masks) in sched_init_numa()
1928 if (!masks[i]) in sched_init_numa()
1938 masks[i][j] = mask; in sched_init_numa()
2018 if (!masks[i]) in sched_reset_numa()
2022 kfree(masks[i]); in sched_reset_numa()
2024 kfree(masks); in sched_reset_numa()
2096 if (!masks) in sched_numa_find_closest()
2099 if (!masks[i][j]) in sched_numa_find_closest()
2129 if (b == k->masks) { in hop_cmp()
2168 if (!k.masks) in sched_numa_find_nth_cpu()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/mpc/dcn401/ |
| H A D | dcn401_mpc.c | 327 gamut_regs.masks.csc_c11 = mpc401->mpc_mask->MPCC_GAMUT_REMAP_C11_A; in program_gamut_remap()
329 gamut_regs.masks.csc_c12 = mpc401->mpc_mask->MPCC_GAMUT_REMAP_C12_A; in program_gamut_remap()
361 gamut_regs.masks.csc_c11 = mpc401->mpc_mask->MPCC_MCM_FIRST_GAMUT_REMAP_C11_A; in program_gamut_remap()
363 gamut_regs.masks.csc_c12 = mpc401->mpc_mask->MPCC_MCM_FIRST_GAMUT_REMAP_C12_A; in program_gamut_remap()
396 gamut_regs.masks.csc_c11 = mpc401->mpc_mask->MPCC_MCM_SECOND_GAMUT_REMAP_C11_A; in program_gamut_remap()
398 gamut_regs.masks.csc_c12 = mpc401->mpc_mask->MPCC_MCM_SECOND_GAMUT_REMAP_C12_A; in program_gamut_remap()
493 gamut_regs.masks.csc_c11 = mpc401->mpc_mask->MPCC_GAMUT_REMAP_C11_A; in read_gamut_remap()
495 gamut_regs.masks.csc_c12 = mpc401->mpc_mask->MPCC_GAMUT_REMAP_C12_A; in read_gamut_remap()
516 gamut_regs.masks.csc_c11 = mpc401->mpc_mask->MPCC_MCM_FIRST_GAMUT_REMAP_C11_A; in read_gamut_remap()
518 gamut_regs.masks.csc_c12 = mpc401->mpc_mask->MPCC_MCM_FIRST_GAMUT_REMAP_C12_A; in read_gamut_remap()
[all …]
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| /linux-6.15/arch/x86/tools/ |
| H A D | cpufeaturemasks.awk | 70 masks[i] = mask;
75 printf "#define %s_MASK%d\t0x%08xU\n", s, i, masks[i];
80 if (masks[i])
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| /linux-6.15/scripts/ |
| H A D | gfp-translate | 81 static const char *masks[] = {
104 (i < ___GFP_LAST_BIT && masks[i]) ?
105 masks[i] : "*** INVALID ***",
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/hubbub/dcn301/ |
| H A D | dcn301_hubbub.c | 38 hubbub1->shifts->field_name, hubbub1->masks->field_name
48 hubbub1->shifts->field_name, hubbub1->masks->field_name
80 hubbub3->masks = hubbub_mask; in hubbub301_construct()
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| /linux-6.15/arch/loongarch/mm/ |
| H A D | pageattr.c | 20 struct pageattr_masks *masks = walk->private; in set_pageattr_masks() local
22 new_val &= ~(pgprot_val(masks->clear_mask)); in set_pageattr_masks()
23 new_val |= (pgprot_val(masks->set_mask)); in set_pageattr_masks()
112 struct pageattr_masks masks = { in __set_memory() local
121 ret = walk_page_range_novma(&init_mm, start, end, &pageattr_ops, NULL, &masks); in __set_memory()
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| /linux-6.15/net/openvswitch/ |
| H A D | flow_table.c | 223 new = kzalloc(struct_size(new, masks, size) + in tbl_mask_array_alloc()
229 struct_size(new, masks, size)); in tbl_mask_array_alloc()
259 if (ovsl_dereference(old->masks[i])) in tbl_mask_array_realloc()
260 new->masks[new->count++] = old->masks[i]; in tbl_mask_array_realloc()
306 if (mask == ovsl_dereference(ma->masks[i])) in tbl_mask_array_del_mask()
316 rcu_assign_pointer(ma->masks[i], ma->masks[ma_count - 1]); in tbl_mask_array_del_mask()
759 mask = rcu_dereference_ovsl(ma->masks[i]); in flow_lookup()
880 mask = ovsl_dereference(ma->masks[i]); in ovs_flow_tbl_lookup_exact()
996 t = ovsl_dereference(ma->masks[i]); in flow_mask_find()
1177 if (ovsl_dereference(ma->masks[index])) in ovs_flow_masks_rebalance()
[all …]
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