Searched refs:link_level (Results 1 – 5 of 5) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0_2_ppt.c | 506 uint32_t link_level; in smu_v14_0_2_set_default_dpm_table() local 625 for (link_level = 0; link_level < NUM_LINK_LEVELS; link_level++) { in smu_v14_0_2_set_default_dpm_table() 626 if (!skutable->PcieGenSpeed[link_level] && in smu_v14_0_2_set_default_dpm_table() 627 !skutable->PcieLaneCount[link_level] && in smu_v14_0_2_set_default_dpm_table() 628 !skutable->LclkFreq[link_level]) in smu_v14_0_2_set_default_dpm_table() 632 skutable->PcieGenSpeed[link_level]; in smu_v14_0_2_set_default_dpm_table() 634 skutable->PcieLaneCount[link_level]; in smu_v14_0_2_set_default_dpm_table() 636 skutable->LclkFreq[link_level]; in smu_v14_0_2_set_default_dpm_table() 639 if (link_level == 0) in smu_v14_0_2_set_default_dpm_table() 640 link_level++; in smu_v14_0_2_set_default_dpm_table()
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| /linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_7_ppt.c | 583 uint32_t link_level; in smu_v13_0_7_set_default_dpm_table() local 693 for (link_level = 0; link_level < NUM_LINK_LEVELS; link_level++) { in smu_v13_0_7_set_default_dpm_table() 694 if (!skutable->PcieGenSpeed[link_level] && in smu_v13_0_7_set_default_dpm_table() 695 !skutable->PcieLaneCount[link_level] && in smu_v13_0_7_set_default_dpm_table() 696 !skutable->LclkFreq[link_level]) in smu_v13_0_7_set_default_dpm_table() 700 skutable->PcieGenSpeed[link_level]; in smu_v13_0_7_set_default_dpm_table() 702 skutable->PcieLaneCount[link_level]; in smu_v13_0_7_set_default_dpm_table() 704 skutable->LclkFreq[link_level]; in smu_v13_0_7_set_default_dpm_table()
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| H A D | smu_v13_0_0_ppt.c | 576 uint32_t link_level; in smu_v13_0_0_set_default_dpm_table() local 695 for (link_level = 0; link_level < NUM_LINK_LEVELS; link_level++) { in smu_v13_0_0_set_default_dpm_table() 696 if (!skutable->PcieGenSpeed[link_level] && in smu_v13_0_0_set_default_dpm_table() 697 !skutable->PcieLaneCount[link_level] && in smu_v13_0_0_set_default_dpm_table() 698 !skutable->LclkFreq[link_level]) in smu_v13_0_0_set_default_dpm_table() 702 skutable->PcieGenSpeed[link_level]; in smu_v13_0_0_set_default_dpm_table() 704 skutable->PcieLaneCount[link_level]; in smu_v13_0_0_set_default_dpm_table() 706 skutable->LclkFreq[link_level]; in smu_v13_0_0_set_default_dpm_table()
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| /linux-6.15/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu_debugfs.c | 1687 int blkaddr, link, link_level; in print_tm_topo() local 1769 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) in print_tm_topo() 1771 if (lvl == link_level) { in print_tm_topo() 1807 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) in print_tm_topo() 1809 if (lvl == link_level) { in print_tm_topo()
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| H A D | rvu_nix.c | 1995 int link_level; in nix_reset_tx_linkcfg() local 2005 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) & 0x01 ? in nix_reset_tx_linkcfg() 2007 if (lvl != link_level) in nix_reset_tx_linkcfg() 2432 u8 link, link_level; in nix_smq_flush() local 2462 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) & 0x01 ? in nix_smq_flush() 2464 tl2_tl3_link_schq = smq_flush_ctx->smq_tree_ctx[link_level].schq; in nix_smq_flush()
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