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Searched refs:link_clock (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c1128 int link_clock = 0; in hsw_ddi_lcpll_get_freq() local
1132 link_clock = 81000; in hsw_ddi_lcpll_get_freq()
1135 link_clock = 135000; in hsw_ddi_lcpll_get_freq()
1138 link_clock = 270000; in hsw_ddi_lcpll_get_freq()
1181 int link_clock = 0; in hsw_ddi_spll_get_freq() local
1185 link_clock = 81000; in hsw_ddi_spll_get_freq()
1188 link_clock = 135000; in hsw_ddi_spll_get_freq()
1191 link_clock = 270000; in hsw_ddi_spll_get_freq()
1891 int link_clock = 0; in skl_ddi_lcpll_get_freq() local
1896 link_clock = 81000; in skl_ddi_lcpll_get_freq()
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H A Dintel_dp.h140 u32 link_clock, u32 lane_count,
H A Dintel_display.h417 int pixel_clock, int link_clock,
H A Dintel_dp.c958 u32 link_clock, u32 lane_count, in intel_dp_dsc_get_max_compressed_bpp() argument
983 bits_per_pixel = ((link_clock * lane_count) * timeslots) / in intel_dp_dsc_get_max_compressed_bpp()
1002 (link_clock * lane_count * 8), in intel_dp_dsc_get_max_compressed_bpp()
1947 static bool is_bw_sufficient_for_dsc_config(int dsc_bpp_x16, u32 link_clock, in is_bw_sufficient_for_dsc_config() argument
1954 available_bw = (link_clock * lane_count * timeslots * 16) / 8; in is_bw_sufficient_for_dsc_config()
H A Dintel_display.c2525 int pixel_clock, int link_clock, in intel_link_compute_m_n() argument
2529 u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock); in intel_link_compute_m_n()
2532 u32 data_n = drm_dp_max_dprx_data_rate(link_clock, nlanes); in intel_link_compute_m_n()
/linux-6.15/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c968 int link_clock, in cdv_intel_dp_compute_m_n() argument
973 m_n->gmch_n = link_clock * nlanes; in cdv_intel_dp_compute_m_n()
976 m_n->link_n = link_clock; in cdv_intel_dp_compute_m_n()