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Searched refs:lcpll (Results 1 – 8 of 8) sorted by relevance

/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dbrcm,iproc-clocks.yaml38 - brcm,ns2-lcpll-ddr
39 - brcm,ns2-lcpll-ports
49 - brcm,sr-lcpll-pcie
203 - brcm,ns2-lcpll-ddr
204 - brcm,ns2-lcpll-ports
262 - brcm,sr-lcpll-pcie
H A Dmicrochip,sparx5-dpll.yaml40 lcpll_clk: lcpll-clk {
/linux-6.15/Documentation/devicetree/bindings/phy/
H A Drockchip,rk3588-hdptx-phy.yaml94 - const: lcpll
117 reset-names = "phy", "apb", "init", "cmn", "lane", "ropll", "lcpll";
/linux-6.15/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2-clock.dtsi43 compatible = "brcm,ns2-lcpll-ddr";
56 compatible = "brcm,ns2-lcpll-ports";
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c510 u32 lcpll = intel_de_read(display, LCPLL_CTL); in hsw_get_cdclk() local
511 u32 freq = lcpll & LCPLL_CLK_FREQ_MASK; in hsw_get_cdclk()
513 if (lcpll & LCPLL_CD_SOURCE_FCLK) in hsw_get_cdclk()
801 u32 lcpll = intel_de_read(display, LCPLL_CTL); in bdw_get_cdclk() local
802 u32 freq = lcpll & LCPLL_CLK_FREQ_MASK; in bdw_get_cdclk()
804 if (lcpll & LCPLL_CD_SOURCE_FCLK) in bdw_get_cdclk()
/linux-6.15/arch/arm64/boot/dts/microchip/
H A Dsparx5.dtsi79 lcpll_clk: lcpll-clk {
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3588-extra.dtsi561 "lcpll";
H A Drk3588-base.dtsi2911 "lcpll";