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Searched refs:lb_size (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/scsi/
H A Dscsi_debug.c4225 res = !memcmp(fsp + (block * lb_size), arr, (num - rest) * lb_size); in comp_write_worker()
4230 rest * lb_size); in comp_write_worker()
4235 arr += num * lb_size; in comp_write_worker()
4236 memcpy(fsp + (block * lb_size), arr, (num - rest) * lb_size); in comp_write_worker()
4238 memcpy(fsp, arr + ((num - rest) * lb_size), rest * lb_size); in comp_write_worker()
5041 lbdof_blen = lbdof * lb_size; in resp_write_scat()
5080 num_by = num * lb_size; in resp_write_scat()
5191 memset(fs1p, 0, lb_size); in resp_write_same()
5208 memmove(fsp + (block * lb_size), fs1p, lb_size); in resp_write_same()
5370 dnum * lb_size, ret); in resp_comp_write()
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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c560 u32 lb_size; /* line buffer allocated to pipe */ member
844 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v6_0_check_latency_hiding()
881 u32 lb_size, u32 num_heads) in dce_v6_0_program_watermarks() argument
929 wm_high.lb_size = lb_size; in dce_v6_0_program_watermarks()
956 wm_low.lb_size = lb_size; in dce_v6_0_program_watermarks()
1008 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v6_0_program_watermarks()
1130 u32 num_heads = 0, lb_size; in dce_v6_0_bandwidth_update() local
1145 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); in dce_v6_0_bandwidth_update()
1146 dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i], lb_size, num_heads); in dce_v6_0_bandwidth_update()
1147 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); in dce_v6_0_bandwidth_update()
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H A Ddce_v8_0.c660 u32 lb_size; /* line buffer allocated to pipe */ member
944 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v8_0_check_latency_hiding()
981 u32 lb_size, u32 num_heads) in dce_v8_0_program_watermarks() argument
1020 wm_high.lb_size = lb_size; in dce_v8_0_program_watermarks()
1059 wm_low.lb_size = lb_size; in dce_v8_0_program_watermarks()
1074 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v8_0_program_watermarks()
1116 u32 num_heads = 0, lb_size; in dce_v8_0_bandwidth_update() local
1127 lb_size = dce_v8_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v8_0_bandwidth_update()
1129 lb_size, num_heads); in dce_v8_0_bandwidth_update()
H A Ddce_v10_0.c707 u32 lb_size; /* line buffer allocated to pipe */ member
991 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v10_0_check_latency_hiding()
1028 u32 lb_size, u32 num_heads) in dce_v10_0_program_watermarks() argument
1067 wm_high.lb_size = lb_size; in dce_v10_0_program_watermarks()
1106 wm_low.lb_size = lb_size; in dce_v10_0_program_watermarks()
1121 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v10_0_program_watermarks()
1161 u32 num_heads = 0, lb_size; in dce_v10_0_bandwidth_update() local
1172 lb_size = dce_v10_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v10_0_bandwidth_update()
1174 lb_size, num_heads); in dce_v10_0_bandwidth_update()
H A Ddce_v11_0.c739 u32 lb_size; /* line buffer allocated to pipe */ member
1023 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v11_0_check_latency_hiding()
1060 u32 lb_size, u32 num_heads) in dce_v11_0_program_watermarks() argument
1099 wm_high.lb_size = lb_size; in dce_v11_0_program_watermarks()
1138 wm_low.lb_size = lb_size; in dce_v11_0_program_watermarks()
1153 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v11_0_program_watermarks()
1193 u32 num_heads = 0, lb_size; in dce_v11_0_bandwidth_update() local
1204 lb_size = dce_v11_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v11_0_bandwidth_update()
1206 lb_size, num_heads); in dce_v11_0_bandwidth_update()
/linux-6.15/drivers/gpu/drm/radeon/
H A Devergreen.c1946 u32 lb_size; /* line buffer allocated to pipe */ member
2131 u32 lb_partitions = wm->lb_size / wm->src_width; in evergreen_check_latency_hiding()
2157 u32 lb_size, u32 num_heads) in evergreen_program_watermarks() argument
2205 wm_high.lb_size = lb_size; in evergreen_program_watermarks()
2232 wm_low.lb_size = lb_size; in evergreen_program_watermarks()
2283 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in evergreen_program_watermarks()
2328 u32 num_heads = 0, lb_size; in evergreen_bandwidth_update() local
2343 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in evergreen_bandwidth_update()
2344 evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in evergreen_bandwidth_update()
2345 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in evergreen_bandwidth_update()
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H A Drs690.c212 u32 lb_size = 8192; in rs690_line_buffer_adjust() local
253 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in rs690_line_buffer_adjust()
256 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in rs690_line_buffer_adjust()
H A Dsi.c2045 u32 lb_size; /* line buffer allocated to pipe */ member
2250 u32 lb_partitions = wm->lb_size / wm->src_width; in dce6_check_latency_hiding()
2276 u32 lb_size, u32 num_heads) in dce6_program_watermarks() argument
2327 wm_high.lb_size = lb_size; in dce6_program_watermarks()
2354 wm_low.lb_size = lb_size; in dce6_program_watermarks()
2407 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce6_program_watermarks()
2444 u32 num_heads = 0, lb_size; in dce6_bandwidth_update() local
2459 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in dce6_bandwidth_update()
2460 dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in dce6_bandwidth_update()
2461 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in dce6_bandwidth_update()
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H A Dcik.c8910 u32 lb_size; /* line buffer allocated to pipe */ member
9194 u32 lb_partitions = wm->lb_size / wm->src_width; in dce8_check_latency_hiding()
9231 u32 lb_size, u32 num_heads) in dce8_program_watermarks() argument
9271 wm_high.lb_size = lb_size; in dce8_program_watermarks()
9311 wm_low.lb_size = lb_size; in dce8_program_watermarks()
9328 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce8_program_watermarks()
9368 u32 num_heads = 0, lb_size; in dce8_bandwidth_update() local
9382 lb_size = dce8_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode); in dce8_bandwidth_update()
9383 dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in dce8_bandwidth_update()
H A Dr100.c3238 u32 lb_size = 8192; in r100_bandwidth_update() local
3663 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in r100_bandwidth_update()
3666 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in r100_bandwidth_update()